Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11188697 | On-chip memory access pattern detection for power and resource reduction | Chaithanya Dudha, Rajeev Patwari, Nithin Kumar Guggilla, Ashish Sirasao | 2021-11-30 |
| 10990736 | Implementing a circuit design with re-convergence | Chaithanya Dudha, Satyaprakash Pareek, Ashish Sirasao | 2021-04-27 |
| 10430539 | Method and apparatus for enhancing performance by moving or adding a pipelined register stage in a cascaded chain | Chaithanya Dudha, Zhao Ma, Ashish Sirasao | 2019-10-01 |
| 10387600 | Dynamic power reduction in circuit designs and circuits | Chaithanya Dudha | 2019-08-20 |
| 10366001 | Partitioning memory blocks for reducing dynamic power consumption | Nithin Kumar Guggilla, Chaithanya Dudha, Chun Zhang, Fan Zhang, Anup Kumar Sultania | 2019-07-30 |
| 9460253 | Selecting predefined circuit implementations in a circuit design system | Elliott Delaye, Ashish Sirasao, Bing Tian | 2016-10-04 |
| 9268891 | Compact and efficient circuit implementation of dynamic ranges in hardware description languages | Elliott Delaye, Ashish Sirasao, Bing Tian | 2016-02-23 |
| 9235498 | Circuits for and methods of enabling the modification of an input data stream | Jay Southard, Elliott Delaye, Ashish Sirasao, Bing Tian | 2016-01-12 |
| 8667436 | Object identification in an electronic circuit design | Elliot Delaye, Ashish Sirasao | 2014-03-04 |
| 6618835 | Transforming a circuit having loop structure and tri-state element using replication | Kenneth S. McElvain | 2003-09-09 |