Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9536178 | System and method for structuring a large scale object recognition engine to maximize recognition accuracy and emulate human visual cortex | — | 2017-01-03 |
| 8811727 | Methods for efficient classifier training for accurate object recognition in images and video | — | 2014-08-19 |
| 7266811 | Methods, systems, and computer program products for translating machine code associated with a first processor for execution on a second processor | Keith M. Bindloss, Wade Guthrie | 2007-09-04 |
| 7127588 | Apparatus and method for an improved performance VLIW processor | John R. Spence | 2006-10-24 |
| 7100022 | Area and power efficient VLIW processor with improved speed | John R. Spence, Kevin Bowles, Chien-Wei Li | 2006-08-29 |
| 6820194 | Method for reducing power when fetching instructions in a processor and related apparatus | Sameer Bidichandani | 2004-11-16 |
| 6684319 | System for efficient operation of a very long instruction word digital signal processor | Keith M. Bindloss | 2004-01-27 |
| 6684320 | Apparatus and method for issue grouping of instructions in a VLIW processor | Chien-Wei Li, John R. Spence | 2004-01-27 |
| 6415376 | Apparatus and method for issue grouping of instructions in a VLIW processor | Chien-Wei Li, John R. Spence | 2002-07-02 |
| 6366998 | Reconfigurable functional units for implementing a hybrid VLIW-SIMD programming model | — | 2002-04-02 |
| 6301653 | Processor containing data path units with forwarding paths between two data path units and a unique configuration or register blocks | John R. Spence, Kenneth Malich | 2001-10-09 |
| 6230180 | Digital signal processor configuration including multiplying units coupled to plural accumlators for enhanced parallel mac processing | — | 2001-05-08 |
| 6061711 | Efficient context saving and restoring in a multi-tasking computing system environment | Seungyoon Peter Song, Heonchul Park, Le Trong Nguyen, Jerry R. Van Aken, Alessandro Forin +1 more | 2000-05-09 |
| 6016395 | Programming a vector processor and parallel programming of an asymmetric dual multiprocessor comprised of a vector processor and a risc processor | — | 2000-01-18 |
| 6014512 | Method and apparatus for simulation of a multi-processor circuit | Ian James Rickards | 2000-01-11 |
| 6003129 | System and method for handling interrupt and exception events in an asymmetric multiprocessor architecture | Seungyeon Peter Song, Heon-Chul Park, Le Trong Nguyen | 1999-12-14 |
| 5996058 | System and method for handling software interrupts with argument passing | Seungyeon Peter Song, Heon-Chul Park, Le Trong Nguyen | 1999-11-30 |
| 5978838 | Coordination and synchronization of an asymmetric, single-chip, dual multiprocessor | Heonchul Park, Le Trong Nguyen | 1999-11-02 |
| 5966734 | Resizable and relocatable memory scratch pad as a cache slice | Heonchul Park | 1999-10-12 |
| 5838984 | Single-instruction-multiple-data processing using multiple banks of vector registers | Le Trong Nguyen, Seungyoon Peter Song, Heonchul Park, Roney S. Wong | 1998-11-17 |