Issued Patents All Time
Showing 1–25 of 26 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6401194 | Execution unit for processing a data stream independently and in parallel | Le Trong Nguyen, Heonchul Park, Ted T. Nguyen, Edward H. Yu | 2002-06-04 |
| 6078941 | Computational structure having multiple stages wherein each stage includes a pair of adders and a multiplexing circuit capable of operating in parallel | Shao-Kun Jiang, Seungyoon Peter-Song | 2000-06-20 |
| 6018757 | Zero detect for binary difference | — | 2000-01-25 |
| 6007232 | Calculating the average of two integer numbers rounded towards zero in a single instruction cycle | — | 1999-12-28 |
| 5995994 | Calculating A -sign(A) in a single instruction cycle | — | 1999-11-30 |
| 5954790 | Method and apparatus for parallel prediction and computation of massive cancellation in floating point subtraction | — | 1999-09-21 |
| 5943250 | Parallel multiplier that supports multiple numbers with different bit lengths | Chang-Soo Kim, Le Trong Nguyen | 1999-08-24 |
| 5928316 | Fused floating-point multiply-and-accumulate unit with carry correction | Shao-Kun Jiang | 1999-07-27 |
| 5930159 | Right-shifting an integer operand and rounding a fractional intermediate result to obtain a rounded integer result | — | 1999-07-27 |
| 5923577 | Method and apparatus for generating an initial estimate for a floating point reciprocal | Hei Tao Fung | 1999-07-13 |
| 5917739 | Calculating the average of four integer numbers rounded towards zero in a single instruction cycle | — | 1999-06-29 |
| 5856936 | Calculating A - sign(A) in a single instruction cycle | — | 1999-01-05 |
| 5850347 | Calculating 2A+ sign(A) in a single instruction cycle | — | 1998-12-15 |
| 5847979 | Method and apparatus for generating an initial estimate for a floating point reciprocal of a square root | Hei Tao Fung | 1998-12-08 |
| 5844827 | Arithmetic shifter that performs multiply/divide by two to the nth power for positive and negative N | — | 1998-12-01 |
| 5838984 | Single-instruction-multiple-data processing using multiple banks of vector registers | Le Trong Nguyen, Seungyoon Peter Song, Moataz A. Mohamed, Heonchul Park | 1998-11-17 |
| 5835394 | Calculating selected sign 3 expression in a single instruction cycle | — | 1998-11-10 |
| 5835389 | Calculating the absolute difference of two integer numbers in a single instruction cycle | — | 1998-11-10 |
| 5831887 | Calculating 2A-sign(A) in a single instruction cycle | — | 1998-11-03 |
| 5831886 | Calculating a + sign(A) in a single instruction cycle | — | 1998-11-03 |
| 5832288 | Element-select mechanism for a vector processor | — | 1998-11-03 |
| 5822231 | Ternary based shifter that supports multiple data types for shift functions | Edward H. Yu | 1998-10-13 |
| 5798958 | Zero detect for binary sum | — | 1998-08-25 |
| 5751617 | Calculating the average of two integer numbers rounded away from zero in a single instruction cycle | — | 1998-05-12 |
| 5745393 | Left-shifting an integer operand and providing a clamped integer result | — | 1998-04-28 |