Issued Patents All Time
Showing 1–25 of 65 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12182485 | Embedded processor architecture with shared memory with design under test | Christopher Shane Coffman, Hitesh Gannu | 2024-12-31 |
| 11900135 | Emulation system supporting representation of four-state signals | Yuhei Hayashi | 2024-02-13 |
| 11610040 | System interconnect architecture using dynamic bitwise switch and low-latency input/output | Barton L. Quayle | 2023-03-21 |
| 11573883 | Systems and methods for enhanced compression of trace data in an emulation system | Aruna Aluri, Linwei Ding | 2023-02-07 |
| 11520531 | Systems and methods for intercycle gap refresh and backpressure management | Justin Schmelzer, Aruna Aluri | 2022-12-06 |
| 11474844 | Emulator synchronization subsystem with enhanced slave mode | Justin Schmelzer | 2022-10-18 |
| 11467620 | Architecture and methodology for tuning clock phases to minimize latency in a serial interface | Yuhei Hayashi | 2022-10-11 |
| 11461522 | Emulation system supporting computation of four-state combinational functions | Yuhei Hayashi | 2022-10-04 |
| 11449337 | Pseudorandom keephot instructions to mitigate large load steps during hardware emulation | Yuhei Hayashi | 2022-09-20 |
| 11366950 | Tiled datamesh architecture | Tarik H. Omar, TheHung Luu, Zaid Khan, Jerome Albert | 2022-06-21 |
| 11308008 | Systems and methods for handling DPI messages outgoing from an emulator system | Christian Wiencke, Bhoumik Shah, Ping-Sheng Tseng | 2022-04-19 |
| 11301414 | Systems and methods for communicating with clients with non-deterministic response delay over a communication interface | Xiaolei Guo | 2022-04-12 |
| 11275598 | Dynamic one-bit multiplexing switch for emulation interconnect | Yuhei Hayashi | 2022-03-15 |
| 11243856 | Framing protocol supporting low-latency serial interface in an emulation system | Yuhei Hayashi | 2022-02-08 |
| 11194942 | Emulation system supporting four-state for sequential logic circuits | Yuhei Hayashi | 2021-12-07 |
| 11176018 | Inline hardware compression subsystem for emulation trace data | Aruna Aluri, Linwei Ding | 2021-11-16 |
| 11156660 | In-system scan test of electronic devices | Xiaolei Guo, Phung Truong, Justin Schmelzer | 2021-10-26 |
| 11106846 | Systems and methods for emulation data array compaction | Yuhei Hayashi | 2021-08-31 |
| 11048843 | Dynamic netlist modification of compacted data arrays in an emulation system | Yuhei Hayashi | 2021-06-29 |
| 11042500 | Systems and methods for high-speed data transfer over a communication interface | Xiaolei Guo | 2021-06-22 |
| 10997343 | In-system scan test of chips in an emulation system | Xiaolei Guo, Phung Truong, Justin Schmelzer | 2021-05-04 |
| 10990728 | Functional built-in self-test architecture in an emulation system | Yuhei Hayashi | 2021-04-27 |
| 10860763 | Data routing and multiplexing architecture to support serial links and advanced relocation of emulation models | Yuhei Hayashi | 2020-12-08 |
| 10536553 | Method and system to transfer data between components of an emulation system | Sharon Mutchnik, Hitesh Gannu, Ramesh Mogili | 2020-01-14 |
| 10509877 | Systems and methods for reducing latency when transferring I/O between an emulator and target device | Viktor Salitrennik, Gavin Zawalski | 2019-12-17 |