YH

Yuhei Hayashi

CS Cadence Design Systems: 16 patents #57 of 2,263Top 3%
NT NTT: 8 patents #658 of 4,871Top 15%
Overall (All Time): #158,516 of 4,157,543Top 4%
25
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12316604 Registration system, registration method, and registration program Hiroshi Suzuki, Ichiro Kudo, Hiroshi Osawa, Yuki Miyoshi, Takeaki NISHIOKA 2025-05-27
12273612 Test system Jun MITSUDO 2025-04-08
12028234 Conversion device, conversion method, and conversion program Takeaki NISHIOKA, Chiharu MORIOKA, Shohei KAMAMURA, Yuki Miyoshi 2024-07-02
11900135 Emulation system supporting representation of four-state signals Mitchell G. Poplack 2024-02-13
11902310 Detection device and detection method Ichiro Kudo, Hiroshi Osawa, Takeaki NISHIOKA 2024-02-13
11863416 Imparting device, imparting method, and imparting program Hiroshi Osawa, Takeaki NISHIOKA, Hiroki Inoue 2024-01-02
11824767 Communication system and method of verifying continuity Yuki Miyoshi, Ichiro Kudo, Hiroshi Osawa, Hiroshi Suzuki, Takeaki NISHIOKA 2023-11-21
11729103 Estimation method, estimation device, and estimation program Hiroshi Suzuki, Yuki Miyoshi, Takeaki NISHIOKA, Hiroshi Osawa, Ichiro Kudo 2023-08-15
11570206 Control system, control determination device, and control method Hiroshi Suzuki, Takeaki NISHIOKA, Katsuhiko Sakai, Ichiro Kudo 2023-01-31
11570067 Analysis system and analysis method Ichiro Kudo, Hiroyuki Onishi, Hiroshi Osawa, Hiroshi Suzuki, Takeaki NISHIOKA +1 more 2023-01-31
11467620 Architecture and methodology for tuning clock phases to minimize latency in a serial interface Mitchell G. Poplack 2022-10-11
11461522 Emulation system supporting computation of four-state combinational functions Mitchell G. Poplack 2022-10-04
11449337 Pseudorandom keephot instructions to mitigate large load steps during hardware emulation Mitchell G. Poplack 2022-09-20
11275598 Dynamic one-bit multiplexing switch for emulation interconnect Mitchell G. Poplack 2022-03-15
11243856 Framing protocol supporting low-latency serial interface in an emulation system Mitchell G. Poplack 2022-02-08
11194942 Emulation system supporting four-state for sequential logic circuits Mitchell G. Poplack 2021-12-07
11106846 Systems and methods for emulation data array compaction Mitchell G. Poplack 2021-08-31
11048843 Dynamic netlist modification of compacted data arrays in an emulation system Mitchell G. Poplack 2021-06-29
10990728 Functional built-in self-test architecture in an emulation system Mitchell G. Poplack 2021-04-27
10860763 Data routing and multiplexing architecture to support serial links and advanced relocation of emulation models Mitchell G. Poplack 2020-12-08
10386909 Method and system to mitigate large power load steps due to intermittent execution in a computation system Mitchell G. Poplack 2019-08-20
10324740 Enhanced control system for flexible programmable logic and synchronization Mitchell G. Poplack 2019-06-18
10303230 Method and system to mitigate large power load steps due to intermittent execution in a computation system Mitchell G. Poplack, Beshara Elmufdi, Hitesh Gannu 2019-05-28
9910810 Multiphase I/O for processor-based emulation system Mitchell G. Poplack, Beshara Elmufdi 2018-03-06
9721048 Multiprocessing subsystem with FIFO/buffer modes for flexible input/output processing in an emulation system Mitchell G. Poplack, Mark Alton Sherred 2017-08-01