Issued Patents All Time
Showing 25 most recent of 32 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10652493 | Low-noise, high dynamic-range image sensor | John Ladd, Michael Guidash, Craig M. Smith, Thomas Vogelsang, Jay Endsley +1 more | 2020-05-12 |
| 10165209 | Low-noise, high dynamic-range image sensor | John Ladd, Michael Guidash, Craig M. Smith, Thomas Vogelsang, Jay Endsley +1 more | 2018-12-25 |
| 9894304 | Line-interleaved image sensors | Craig M. Smith, Michael Guidash, Thomas Vogelsang, Jay Endsley | 2018-02-13 |
| 9432597 | Low-noise, high dynamic-range image sensor | Michael Guidash, Thomas Vogelsang, Jay Endsley, James E. Harris, Craig M. Smith +1 more | 2016-08-30 |
| 8935489 | Adaptively time-multiplexing memory references from multiple processor cores | Steven C. Woo, Trung Diep | 2015-01-13 |
| 8149874 | Adaptive-allocation of I/O bandwidth using a configurable interconnect topology | Steven C. Woo | 2012-04-03 |
| 8073009 | Adaptive allocation of I/O bandwidth using a configurable interconnect topology | Steven C. Woo | 2011-12-06 |
| 7755968 | Integrated circuit memory device having dynamic memory bank count and page size | Steven C. Woo, Chad A. Bellows, Wayne S. Richardson, Kurt Knorpp, Jun Kim | 2010-07-13 |
| 7420990 | Adaptive-allocation of I/O bandwidth using a configurable interconnect topology | Steven C. Woo | 2008-09-02 |
| 7352234 | Current control technique | John B. Dillon, William Stonecypher, Andy Peng-Pui Chan, Matthew Murdy Griffin, Billy Wayne Garrett, Jr. | 2008-04-01 |
| 7288973 | Method and apparatus for fail-safe resynchronization with minimum latency | Jared L. Zerbe, Abhijit M. Abhyankar, Richard M. Barth, Andy Peng-Pui Chan, Paul G. Davis +1 more | 2007-10-30 |
| 7254075 | Integrated circuit memory system having dynamic memory bank count and page size | Steven C. Woo, Chad A. Bellows, Wayne S. Richardson, Kurt Knorpp, Jun Kim | 2007-08-07 |
| 7194056 | Determining phase relationships using digital phase values | Jun Kim | 2007-03-20 |
| 7167039 | Memory device having an adjustable voltage swing setting | Billy Wayne Garrett, Jr., William Stonecypher, Andy Peng-Pui Chan, Matthew Murdy Griffin, John B. Dillon | 2007-01-23 |
| 7158536 | Adaptive-allocation of I/O bandwidth using a configurable interconnect topology | Steven C. Woo | 2007-01-02 |
| 7091761 | Impedance controlled output driver | Donald C. Stark, Jun Kim, Kurt Knorpp, Natsuki Kushiyama | 2006-08-15 |
| 6975159 | Method of operation in a system having a memory device having an adjustable output voltage setting | John B. Dillon, William F. Stonecynher, Andy Peng-Pui Chan, Matthew Murdy Griffin, Billy Wayne Garrett, Jr. | 2005-12-13 |
| 6975160 | System including an integrated circuit memory device having an adjustable output voltage setting | Billy Wayne Garrett, Jr., William E. Stonecynher, Andy Peng-Pui Chan, Matthew Murdy Griffin, John B. Dillon | 2005-12-13 |
| 6949958 | Phase comparator capable of tolerating a non-50% duty-cycle clocks | Jared L. Zerbe, Abhijit M. Abhyankar, Richard M. Barth, Andy Peng-Pui Chan, Paul G. Davis +1 more | 2005-09-27 |
| 6922092 | Impedance controlled output driver | Donald C. Stark, Jun Kim, Kurt Knorpp, Natsuki Kushiyama | 2005-07-26 |
| 6870419 | Memory system including a memory device having a controlled output driver characteristic | John B. Dillon, William Stonecypher, Andy Peng-Pui Chan, Matthew Murdy Griffin, Billy Wayne Garrett, Jr. | 2005-03-22 |
| 6661268 | Charge compensation control circuit and method for use with output driver | Donald C. Stark, Jun Kim, Kurt Knorpp, Natsuki Kushiyama | 2003-12-09 |
| 6608507 | Memory system including a memory device having a controlled output driver characteristic | Billy Wayne Garrett, Jr., John B. Dillon, William Stonecypher, Andy Peng-Pui Chan, Matthew Murdy Griffin | 2003-08-19 |
| 6556052 | Semiconductor controller device having a controlled output driver characteristic | Billy Wayne Garrett, Jr., John B. Dillon, William Stonecypher, Andy Peng-Pui Chan, Matthew Murdy Griffin | 2003-04-29 |
| 6473439 | Method and apparatus for fail-safe resynchronization with minimum latency | Jared L. Zerbe, Abhijit M. Abhyankar, Richard M. Barth, Andy Peng-Pui Chan, Paul G. Davis +1 more | 2002-10-29 |