MM

Martin M. Mitan

IN Intel: 8 patents #4,870 of 30,777Top 20%
TR The Arizona Board Of Regents: 1 patents #129 of 428Top 35%
Overall (All Time): #542,203 of 4,157,543Top 15%
9
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11869889 Self-aligned gate endcap (SAGE) architectures without fin end gap Szuya S. Liao, Scott B. Clendenning, Jessica M. Torres, Lukas Baumgartel, Kiran CHIKKADI +4 more 2024-01-09
11810980 Channel formation for three dimensional transistors Chieh-Jen Ku, Pei-Hua Wang, Bernhard Sell, Leonard C. Pipes 2023-11-07
11532724 Selective gate spacers for semiconductor devices Scott B. Clendenning, Szuya S. Liao, Florian Gstrein, Rami Hourani, Patricio E. Romero +1 more 2022-12-20
10998423 Fabrication of multi-channel nanowire devices with self-aligned internal spacers and SOI FinFETs using selective silicon nitride capping Van H. Le, Scott B. Clendenning, Szuya S. Liao 2021-05-04
10971600 Selective gate spacers for semiconductor devices Scott B. Clendenning, Szuya S. Liao, Florian Gstrein, Rami Hourani, Patricio E. Romero +1 more 2021-04-06
10896852 Methods for doping a sub-fin region of a semiconductor fin structure and devices containing the same Scott B. Clendenning, Aaron A. Budrevich 2021-01-19
10720508 Fabrication of multi-channel nanowire devices with self-aligned internal spacers and SOI FinFETs using selective silicon nitride capping Van H. Le, Scott B. Clendenning, Szuya S. Liao 2020-07-21
10396176 Selective gate spacers for semiconductor devices Scott B. Clendenning, Szuya S. Liao, Florian Gstrein, Rami Hourani, Patricio E. Romero +1 more 2019-08-27
6750124 Direct patterning of nanometer-scale silicide structures on silicon by ion-beam implantation through a thin barrier layer David Pivin, James W. Mayer, Terry L. Alford 2004-06-15