Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6851046 | Jumping to a recombine target address which is encoded in a ternary branch instruction | Marc Delvaux | 2005-02-01 |
| 6819971 | Fast computation of overflow flag in a bit manipulation unit | Alexander Goldovsky | 2004-11-16 |
| 6801995 | Method for optimally encoding a set of instruction codes for a digital processor having a plurality of instruction selectable resource types and an associated optimized set of instruction codes | Sivanand Simanapalli, Mark E. Thierbach | 2004-10-05 |
| 6530014 | Near-orthogonal dual-MAC instruction set architecture with minimal encoding bits | Mark E. Thierbach, Sivanand Simanapalli, Larry R. Tate | 2003-03-04 |
| 6446193 | Method and apparatus for single cycle processing of data associated with separate accumulators in a dual multiply-accumulate architecture | Sivanand Simanapalli, Larry R. Tate | 2002-09-03 |
| 6175912 | Accumulator read port arbitration logic | Bin Fu | 2001-01-16 |
| 6064714 | Shifter capable of split operation | Geoffrey Francis Burns, Sivanand Simanapalli | 2000-05-16 |
| 5991785 | Determining an extremum value and its index in an array using a dual-accumulation processor | Sivanand Simanapalli | 1999-11-23 |
| 5987490 | Mac processor with efficient Viterbi ACS operation and automatic traceback store | Sivanand Simanapalli | 1999-11-16 |
| 5889689 | Hierarchical carry-select, three-input saturation | Larry R. Tate | 1999-03-30 |