Issued Patents All Time
Showing 25 most recent of 31 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11916130 | Direct growth of lateral III-V bipolar transistor on silicon substrate | Kuen-Ting Shiu, Tak H. Ning, Jeng-Bang Yau, Cheng-Wei Cheng | 2024-02-27 |
| 11797851 | Inference focus for offline training of SRAM inference engine in binary neural network | Chia-Yu Chen, Jui-Hsin Lai, Li-Wen Hung | 2023-10-24 |
| 11599785 | Inference focus for offline training of SRAM inference engine in binary neural network | Chia-Yu Chen, Jui-Hsin Lai, Li-Wen Hung | 2023-03-07 |
| 11484731 | Cognitive optogenetics probe and analysis | Hariklia Deligianni, Ning Li, Devendra K. Sadana, Roy R. Yu | 2022-11-01 |
| 11362109 | Integrated power amplifier | Xin Zhang, Todd E. Takken | 2022-06-14 |
| 11158506 | Self-aligned, over etched hard mask fabrication method and structure | Frank R. Libsch, Ghavam G. Shahidi, Stephen M. Rossnagel | 2021-10-26 |
| 11056722 | Tool and method of fabricating a self-aligned solid state thin film battery | Frank R. Libsch, Ghavam G. Shahidi, Stephen M. Rossnagel | 2021-07-06 |
| 10998420 | Direct growth of lateral III-V bipolar transistor on silicon substrate | Kuen-Ting Shiu, Tak H. Ning, Jeng-Bang Yau, Cheng-Wei Cheng | 2021-05-04 |
| 10991722 | Ultra low parasitic inductance integrated cascode GaN devices | Xin Zhang, Todd E. Takken | 2021-04-27 |
| 10940554 | Planar fabrication of micro-needles | Li-Wen Hung, Jui-Hsin Lai, Chia-Yu Chen | 2021-03-09 |
| 10943898 | High switching frequency, low loss and small form factor fully integrated power stage | Xin Zhang, Todd E. Takken, Paul W. Coteus, Andrew Ferencz | 2021-03-09 |
| 10930565 | III-V CMOS co-integration | HsinYu Tsai, Renee T. Mo, Cheng-Wei Cheng | 2021-02-23 |
| 10886415 | Multi-state transistor devices with multiple threshold voltage channels | Pierce I-Jen Chuang, Cheng-Wei Cheng, Seyoung Kim | 2021-01-05 |
| 10886328 | Monolithically integrated GaN light-emitting diode with silicon transistor for displays | Ning Li, Shawn Du | 2021-01-05 |
| 10874876 | Multiple light sources integrated in a neural probe for multi-wavelength activation | Hariklia Deligianni, Ning Li, Devendra K. Sadana | 2020-12-29 |
| 10833270 | Lateral electrochemical cell with symmetric response for neuromorphic computing | Matthew W. Copel, Takashi Ando, John Rozen | 2020-11-10 |
| 10720670 | Self-aligned 3D solid state thin film battery | Frank R. Libsch, Ghavam G. Shahidi, Stephen M. Rossnagel | 2020-07-21 |
| 10679853 | Self-aligned, over etched hard mask fabrication method and structure | Frank R. Libsch, Ghavam G. Shahidi, Stephen M. Rossnagel | 2020-06-09 |
| 10535650 | High switching frequency, low loss and small form factor fully integrated power stage | Xin Zhang, Todd E. Takken, Paul W. Coteus, Andrew Ferencz | 2020-01-14 |
| 10251057 | Authentication for device connection using visible patterns | Chia-Yu Chen, Li-Wen Hung, Jui-Hsin Lai | 2019-04-02 |
| 10217641 | Control of current collapse in thin patterned GaN | William J. Gallagher, Marinus Hopstaken, Tomas Palacios, Daniel Piedra, Devendra K. Sadana | 2019-02-26 |
| 9935175 | Sidewall spacer for integration of group III nitride with patterned silicon substrate | Devendra K. Sadana, Brent A. Wacaser | 2018-04-03 |
| 9722033 | Doped zinc oxide as n+ layer for semiconductor devices | Joel P. Desouza, Keith E. Fogel, Jeehwan Kim, Devendra K. Sadana | 2017-08-01 |
| 9653441 | Monolithic integration of a III-V optoelectronic device, a filter and a driving circuit | Chia-Yu Chen, Li-Wen Hung, Jui-Hsin Lai | 2017-05-16 |
| 9324813 | Doped zinc oxide as N+ layer for semiconductor devices | Joel P. Desouza, Keith E. Fogel, Jeehwan Kim, Devendra K. Sadana | 2016-04-26 |