| 11341060 |
Multifunction communication interface supporting memory sharing among data processing systems |
Michael S. Siegel, William J. Starke, Jeffrey A. Stuecheli, Lakshminarayana B. Arimilli, James Francis Mikos +1 more |
2022-05-24 |
| 11113204 |
Translation invalidation in a translation cache serving an accelerator |
Bartholomew Blaner, Michael S. Siegel, Jeffrey A. Stuecheli, William J. Starke, John D. Irish +1 more |
2021-09-07 |
| 11030110 |
Integrated circuit and data processing system supporting address aliasing in an accelerator |
Michael S. Siegel, Bartholomew Blaner, Jeffrey A. Stuecheli, William J. Starke, Derek E. Williams +2 more |
2021-06-08 |
| 10846235 |
Integrated circuit and data processing system supporting attachment of a real address-agnostic accelerator |
Bartholomew Blaner, Michael S. Siegel, Jeffrey A. Stuecheli, William J. Starke, John D. Irish +1 more |
2020-11-24 |
| 10761995 |
Integrated circuit and data processing system having a configurable cache directory for an accelerator |
Bartholomew Blaner, Jeffrey A. Stuecheli, Michael S. Siegel, William J. Starke, Curtis C. Wollbrink +2 more |
2020-09-01 |
| 10613979 |
Accelerator memory coherency with single state machine |
Guy L. Guthrie, Derek E. Williams, Michael S. Siegel, John D. Irish |
2020-04-07 |
| 10216653 |
Pre-transmission data reordering for a serial interface |
Lakshminarayana B. Arimilli, Yiftach Benjamini, Bartholomew Blaner, Daniel M. Dreps, John D. Irish +6 more |
2019-02-26 |
| 7088715 |
Apparatus for filtering inter-node communication in a data processing system |
Timothy R. Block, Richard Booth, David R. Engebretsen, Thomas R. Sand |
2006-08-08 |
| 6944155 |
Apparatus for filtering inter-node communication in a data processing system |
Timothy R. Block, Richard Booth, David R. Engebretsen, Thomas R. Sand |
2005-09-13 |