JS

Justin Hiroki Sato

MI Microchip Technology Incorporated: 13 patents #37 of 958Top 4%
ST Silicon Storage Technology: 1 patents #163 of 239Top 70%
📍 West Linn, OR: #54 of 419 inventorsTop 15%
🗺 Oregon: #3,112 of 28,073 inventorsTop 15%
Overall (All Time): #344,750 of 4,157,543Top 9%
14
Patents All Time

Issued Patents All Time

Showing 1–14 of 14 patents

Patent #TitleCo-InventorsDate
11043471 Mixed-orientation multi-die integrated circuit package with at least one vertically-mounted die Bomy Chen 2021-06-22
10896888 Integrated circuit (IC) device including a force mitigation system for reducing under-pad damage caused by wire bond Bomy Chen, Andrew Taylor 2021-01-19
10818748 Thin-film resistor (TFR) formed under a metal layer and method of fabrication Yaojian Leng, Bonnie Hamlin, Andrew Taylor, Janet Vanderiet 2020-10-27
10658453 Aluminum compatible thin-film resistor (TFR) and manufacturing methods Yaojian Leng, Greg Stom 2020-05-19
10553336 Thin-film resistor (TFR) module with top-side interconnects connected to reduced TFR ridges and manufacturing methods Yaojian Leng, Greg Stom 2020-02-04
10381330 Sacrificial alignment ring and self-soldering vias for wafer bonding Bomy Chen, Walter Lundy 2019-08-13
10056545 Sidewall-type memory cell Bomy Chen, Sonu Daryanani 2018-08-21
10002785 Air-gap assisted etch self-aligned dual Damascene Andrew Taylor 2018-06-19
9953886 Single-wafer real-time etch rate and uniformity predictor for plasma etch processes Brian Hennes, Yannick Carll Kimmel 2018-04-24
9679844 Manufacturing a damascene thin-film resistor Yaojian Leng 2017-06-13
9627246 Method of forming shallow trench isolation (STI) structures Gregory Allen Stom 2017-04-18
9589828 Method for photolithography-free self-aligned reverse active etch Gregory Allen Stom 2017-03-07
9444040 Sidewall type memory cell Bomy Chen, Sonu Daryanani 2016-09-13
8853091 Method for manufacturing a semiconductor die with multiple depth shallow trench isolation Brian Hennes, Greg Stom, Robert P. Ma, Walter Lundy 2014-10-07