Issued Patents All Time
Showing 25 most recent of 147 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12430258 | Padding cached data with valid data for memory flush commands | Kishore Kumar Muchherla, Akira Goda | 2025-09-30 |
| 12417035 | Modified read counter incrementing scheme in a memory sub-system | Kishore Kumar Muchherla, Nicola Ciocchini, Animesh Chowdhury, Akira Goda, Jung Sheng Hoei +2 more | 2025-09-16 |
| 12411775 | Dual address encoding for logical-to-physical mapping | Giuseppe Cariello | 2025-09-09 |
| 12399630 | Peak power management priority override | Jeremy Binfet, Liang Yu, Chulbum Kim, Daniel J. Hubbard, Suresh Rajgopal | 2025-08-26 |
| 12400726 | Topology-based retirement in a memory system | Chun Sum Yeung, Deping He | 2025-08-26 |
| 12386543 | Opportunistic storage of non-write-boosted data in write booster cache memory | Giuseppe Cariello, Reshmi Basu | 2025-08-12 |
| 12386518 | Write booster pinning | Reshmi Basu, Yanhua Bi | 2025-08-12 |
| 12366997 | Storing parity during refresh operations | Reshmi Basu | 2025-07-22 |
| 12362022 | Scheduled interrupts for peak power management token ring communication | Jeremy Binfet, Liang Yu | 2025-07-15 |
| 12362030 | Techniques for retiring blocks of a memory system | Deping He, Chun Sum Yeung | 2025-07-15 |
| 12353723 | Low-power boot-up for memory systems | Reshmi Basu, David Aaron Palmer, Luca Porzio, Giuseppe Cariello, Stephen Hanna | 2025-07-08 |
| 12346587 | Techniques for concurrent host system access and data folding | Nitul Gohain, Jameer Mulani | 2025-07-01 |
| 12340126 | Workload-based scan optimization | Kishore Kumar Muchherla, Eric N. Lee, Jeffrey S. McNeil, Lakshmi Kalpana Vakati | 2025-06-24 |
| 12333145 | Peak power management in a memory device during suspend status | Liang Yu, Fumin Gu, John Paul Aglubat | 2025-06-17 |
| 12288579 | Methods for independent memory bank maintenance and memory devices and systems employing the same | George B. Raad, James S. Rehmeyer, Timothy B. Cowles | 2025-04-29 |
| 12248705 | Dynamic memory address write policy translation based on performance needs | Giuseppe Cariello | 2025-03-11 |
| 12235707 | Charge-sharing capacitive monitoring circuit in a multi-chip package to control power | Stephen L. Miller, Liang Yu | 2025-02-25 |
| 12216915 | Adaptive read disturb scan | Animesh Chowdhury, Kishore Kumar Muchherla, Nicola Ciocchini, Akira Goda, Jung Sheng Hoei +1 more | 2025-02-04 |
| 12204792 | Adaptive throughput monitoring | Reshmi Basu, David Aaron Palmer | 2025-01-21 |
| 12169648 | Caching for multiple-level memory device | Reshmi Basu, Nitul Gohain | 2024-12-17 |
| 12170113 | Concurrent programming of retired wordline cells with dummy data | Jeffrey S. McNeil, Kishore Kumar Muchherla, Sead Zildzic, Akira Goda, Violante Moschiano | 2024-12-17 |
| 12153827 | Non-volatile memory module architecture to support memory error correction | George E. Pax | 2024-11-26 |
| 12147702 | Host training indication for memory artificial intelligence | Nicolas Soberanes, Ezra E. Hartz, Bruce J. Ford, Joseph A. De La Cerda, Benjamin C. Rivera | 2024-11-19 |
| 12135887 | Sequential data optimized sub-regions in storage devices | David Aaron Palmer, Sean L. Manion, Stephen Hanna, Qing Liang, Nadav Grosz +2 more | 2024-11-05 |
| 12131028 | Programming selective word lines during an erase operation in a memory device | Jeffrey S. McNeil, Ugo Russo, Akira Goda, Kishore Kumar Muchherla, Violante Moschiano +2 more | 2024-10-29 |