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Method and apparatus for implementing two architectures in a chip |
Patrick Knebel, Kevin Safford, Donald Soltis, Stephen R. Undy, Russell C. Brockmann |
2008-03-11 |
| 6618801 |
Method and apparatus for implementing two architectures in a chip using bundles that contain microinstructions and template information |
Patrick Knebel, Kevin Safford, Donald Soltis, Stephen R. Undy, Russell C. Brockmann |
2003-09-09 |
| 6542862 |
Determining register dependency in multiple architecture systems |
Kevin Safford, Patrick Knebel |
2003-04-01 |
| 6278627 |
Multiple input bit-line detection with phase stealing latch in a memory design |
Kevin Liao, Christopher Allan Poirier |
2001-08-21 |
| 5579253 |
Computer multiply instruction with a subresult selection option |
Ruby B. Lee, Charles R. Dowdell |
1996-11-26 |
| 5574676 |
Integer multiply instructions incorporating a subresult selection option |
Ruby B. Lee, Charles R. Dowdell |
1996-11-12 |
| 5448509 |
Efficient hardware handling of positive and negative overflow resulting from arithmetic operations |
Ruby B. Lee |
1995-09-05 |
| 5390135 |
Parallel shift and add circuit and method |
Ruby B. Lee |
1995-02-14 |
| 5306962 |
Qualified non-overlapping clock generator to provide control lines with non-overlapping clock timing |
— |
1994-04-26 |
| 5166899 |
Lookahead adder |
— |
1992-11-24 |
| 5124572 |
VLSI clocking system using both overlapping and non-overlapping clocks |
Russell W. Mason, Leon Sigal |
1992-06-23 |
| 5043934 |
Lookahead adder with universal logic gates |
— |
1991-08-27 |