Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6165858 | Enhanced silicidation formation for high speed MOS device by junction grading with dual implant dopant species | Mark I. Gardner, Fred N. Hause | 2000-12-26 |
| 5976925 | Process of fabricating a semiconductor devise having asymmetrically-doped active region and gate electrode | Derick J. Wristers, James F. Buller | 1999-11-02 |
| 5970311 | Method and structure for optimizing the performance of a semiconductor device having dense transistors | Daniel Kadosh, Derick J. Wristers | 1999-10-19 |
| 5970349 | Semiconductor device having one or more asymmetric background dopant regions and method of manufacture thereof | Mark I. Gardner, Michael Duane | 1999-10-19 |
| 5913116 | Method of manufacturing an active region of a semiconductor by diffusing a dopant out of a sidewall spacer | Mark I. Gardner | 1999-06-15 |