JC

Jijun Chen

CS Cadence Design Systems: 5 patents #303 of 2,263Top 15%
📍 San Jose, CA: #10,736 of 32,062 inventorsTop 35%
🗺 California: #106,790 of 386,348 inventorsTop 30%
Overall (All Time): #990,747 of 4,157,543Top 25%
5
Patents All Time

Issued Patents All Time

Showing 1–5 of 5 patents

Patent #TitleCo-InventorsDate
9582626 Using waveform propagation for accurate delay calculation Igor Keller, Eddy Pramono, Nikolay Rubanov 2017-02-28
9384310 View data sharing for efficient multi-mode multi-corner timing analysis Igor Keller, Pradeep Yadav 2016-07-05
9003342 Lumped aggressor model for signal integrity timing analysis Igor Keller, Dhananjay Kumar Griyage 2015-04-07
8924905 Constructing equivalent waveform models for static timing analysis of integrated circuit designs Igor Keller, Joel R. Philips 2014-12-30
8601420 Equivalent waveform model for static timing analysis of integrated circuit designs Igor Keller, Joel R. Phillips 2013-12-03