Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10922469 | Methods and systems of enabling concurrent editing of hierarchical electronic circuit layouts | Yuan-Kai Pei, Gautam Kumar | 2021-02-16 |
| 10783312 | Methods, systems, and computer program product for determining layout equivalence for a multi-fabric electronic design | Arnold Ginetti, Jean-Noel Pic, Xavier Alasseur | 2020-09-22 |
| 10671793 | Editing of layout designs for fixing DRC violations | Devendra Deshpande, Chun Wen Chiang, Sheng-Wei Lin, Vandana Gupta | 2020-06-02 |
| 9842183 | Methods and systems for enabling concurrent editing of electronic circuit layouts | Arnold Ginetti, Jean-Noel Pic, Olivier Arnaud, Devendra Deshpande | 2017-12-12 |
| 9773082 | Circuit design employing stamp patterns | Fabrice Raymond Morlat, Fabien Campana | 2017-09-26 |
| 9761204 | System and method for accelerated graphic rendering of design layout having variously sized geometric objects | Arnold Ginetti, Jean-Noel Pic, Philippe Bourdon | 2017-09-12 |
| 9684748 | System and method for identifying an electrical short in an electronic design | Olivier Badel, Nicolas Hadacek | 2017-06-20 |
| 9542084 | System and method for generating vias in an electronic design by automatically using a hovering cursor indication | Stephane Colancon, Mark Nitters, Fabien Campana | 2017-01-10 |
| 9208273 | Methods, systems, and articles of manufacture for implementing clone design components in an electronic design | Fabrice Raymond Morlat, Fabien Campana | 2015-12-08 |
| 9092586 | Version management mechanism for fluid guard ring PCells | Arnold Ginetti, Jean-Noel Pic, Manav Khanna, Reenee Tayal, Mayank Sharma | 2015-07-28 |
| 8527934 | Method and system for implementing graphically editable parameterized cells | Arnold Ginetti, Theodore A. Paone, Jim Newton, Jean-Noel Pic | 2013-09-03 |
| 8347261 | Method and system for implementing graphically editable parameterized cells | Arnold Ginetti, Theodore A. Paone, Jim Newton, Jean-Noel Pic | 2013-01-01 |
| 7555739 | Method and apparatus for maintaining synchronization between layout clones | Arnold Ginetti, Jean-Marc Bourguet, Laurent Robert Chouraki, Fabrice Raymond Morlat, Carole Perrot | 2009-06-30 |
| 6397370 | Method and system for breaking complex Boolean networks | Jean-Michel Fernandez | 2002-05-28 |
| 5805462 | Automatic synthesis of integrated circuits employing boolean decomposition | Frank Poirot, Ramine Roane | 1998-09-08 |
| 5537580 | Integrated circuit fabrication using state machine extraction from behavioral hardware description language | Jean-Charles Giomi | 1996-07-16 |