Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11017145 | System and method for repeating a synchronized set of layout geometries | Ashwani Kumar Sanwal, Devendra Deshpande | 2021-05-25 |
| 10671793 | Editing of layout designs for fixing DRC violations | Devendra Deshpande, Gerard Tarroux, Chun Wen Chiang, Sheng-Wei Lin | 2020-06-02 |
| 8521687 | Apparatus, system, and method for selecting optimal replica sources in a grid computing environment | Scott J. Colbeck, Jian Xu | 2013-08-27 |
| 8239797 | Congestion aware block placement | Sanjib Ghosh, Hitesh Marwah, Mahendra Singh Khalsa, Pawan Fangaria | 2012-08-07 |
| 7971174 | Congestion aware pin optimizer | Mahendra Singh Khalsa, Sanjib Ghosh, Hitesh Marwah, Pawan Fangaria | 2011-06-28 |