Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10643016 | System, method and computer program product for design rule awareness associated with die and package electronic circuit co-design | Chayan Majumder, Arnold Ginetti | 2020-05-05 |
| 10565342 | Electronic circuit design editor with overlay of layout and schematic design features | Arnold Ginetti, Sunil Prasad Todi | 2020-02-18 |
| 8327315 | System and method for process rules editors | Sandipan Ghosh, Pawan Fangaria, Arbind Kumar | 2012-12-04 |
| 8239797 | Congestion aware block placement | Sanjib Ghosh, Vandana Gupta, Mahendra Singh Khalsa, Pawan Fangaria | 2012-08-07 |
| 7971174 | Congestion aware pin optimizer | Mahendra Singh Khalsa, Sanjib Ghosh, Vandana Gupta, Pawan Fangaria | 2011-06-28 |
| 7971178 | System to merge custom and synthesized digital integrated circuit design data | Arnold Ginetti | 2011-06-28 |