RT

Reenee Tayal

CS Cadence Design Systems: 3 patents #541 of 2,263Top 25%
SS Stmicroelectronics Sa: 2 patents #2,729 of 4,662Top 60%
Overall (All Time): #1,169,140 of 4,157,543Top 30%
4
Patents All Time

Issued Patents All Time

Showing 1–4 of 4 patents

Patent #TitleCo-InventorsDate
10706206 Methods for layout driven synthesis of transmission line routes in integrated circuits Sutirtha Kabir, Vishal Agarwal 2020-07-07
9785739 System and method for fluid parameterized cell evaluation Vishal Agarwal, Mayank Sharma, Farhat Khan 2017-10-10
9092586 Version management mechanism for fluid guard ring PCells Arnold Ginetti, Jean-Noel Pic, Manav Khanna, Mayank Sharma, Gerard Tarroux 2015-07-28
7392171 Test bench generator for integrated circuits, particularly memories Gianluca Blasi 2008-06-24