YP

Yuan-Kai Pei

CS Cadence Design Systems: 4 patents #399 of 2,263Top 20%
SY Synopsys: 1 patents #1,143 of 2,302Top 50%
SC Synopsys Taiwan Co.: 1 patents #19 of 52Top 40%
Overall (All Time): #955,430 of 4,157,543Top 25%
5
Patents All Time

Issued Patents All Time

Showing 1–5 of 5 patents

Patent #TitleCo-InventorsDate
11347914 System and method for automatic performance analysis in an electronic circuit design Wei-Cheng Chen, Yu-Chi Su 2022-05-31
10922469 Methods and systems of enabling concurrent editing of hierarchical electronic circuit layouts Gautam Kumar, Gerard Tarroux 2021-02-16
9779193 Methods, systems, and computer program product for implementing electronic design layouts with symbolic representations Arnold Ginetti, Yu-Chi Su 2017-10-03
8910100 System and method for automatically reconfiguring chain of abutted devices in electronic circuit design Thomas Evan Wilson, Arnold Ginetti, Kenneth Ferguson 2014-12-09
8869084 Parameterized cell layout generation guided by a design rule checker Chien-Fu Chung, Shyh-An Tang 2014-10-21