Issued Patents All Time
Showing 25 most recent of 51 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12020066 | Asynchronous completion notification in a multi-core data processing system | David A. Shedivy, Daniel Wind, Wayne M. Barrett | 2024-06-25 |
| 12001343 | Selective distribution of translation entry invalidation requests in a multithreaded data processing system | Derek E. Williams | 2024-06-04 |
| 11755362 | Techniques for handling escalation of interrupts in a data processing system | Benjamin Herrenschmidt | 2023-09-12 |
| 11645215 | Efficient selection of a particular processor thread for handling an interrupt | Wayne M. Barrett, David A. Shedivy | 2023-05-09 |
| 11561819 | Techniques for adapting escalation paths of interrupts in a data processing system | — | 2023-01-24 |
| 11556482 | Security for address translation services | Guerney D. H. Hunt, Charles Ray Johns, Charanjit Singh Jutla | 2023-01-17 |
| 11074205 | Managing efficient selection of a particular processor thread for handling an interrupt | Richard Louis Arndt, Wayne M. Barrett, Robert Allen Drehmel, Guy L. Guthrie, Michael S. Siegel +1 more | 2021-07-27 |
| 10614010 | Handling queued interrupts in a data processing system based on a saturate value | Richard Louis Arndt | 2020-04-07 |
| 10565140 | Techniques for issuing interrupts in a data processing system with multiple scopes | Wayne M. Barrett, Robert Allen Drehmel, Michael S. Siegel | 2020-02-18 |
| 10552351 | Techniques for issuing interrupts in a data processing system with multiple scopes | Wayne M. Barrett, Robert Allen Drehmel, Michael S. Siegel | 2020-02-04 |
| 10437755 | Techniques for handling interrupts in a processing unit using virtual processor thread groups | Richard Louis Arndt | 2019-10-08 |
| 10423550 | Managing efficient selection of a particular processor thread for handling an interrupt | Richard Louis Arndt, Wayne M. Barrett, Robert Allen Drehmel, Guy L. Guthrie, Michael S. Siegel +1 more | 2019-09-24 |
| 10248593 | Techniques for handling interrupts in a processing unit using interrupt request queues | Daniel Wind | 2019-04-02 |
| 10229075 | Techniques for escalating interrupts in a processing unit using virtual processor thread groups and software stack levels | Richard Louis Arndt | 2019-03-12 |
| 10229074 | Techniques for handling interrupts in a processing unit using interrupt request queues | Daniel Wind | 2019-03-12 |
| 10210112 | Techniques for issuing interrupts in a data processing system with multiple scopes | Wayne M. Barrett, Robert Allen Drehmel, Michael S. Siegel | 2019-02-19 |
| 10169270 | Techniques for handling interrupt related information in a data processing system | Richard Louis Arndt | 2019-01-01 |
| 10114773 | Techniques for handling interrupts in a processing unit using virtual processor thread groups and software stack levels | Richard Louis Arndt | 2018-10-30 |
| 10083142 | Addressing topology specific replicated bus units | Richard Louis Arndt, Hugh Shen, Derek E. Williams | 2018-09-25 |
| 10067889 | Bridge and method for coupling a requesting interconnect and a serving interconnect in a computer system | Joseph Gerald McDonald | 2018-09-04 |
| 10061723 | Techniques for handling queued interrupts in a data processing system based on a saturation value | Richard Louis Arndt | 2018-08-28 |
| 9904638 | Techniques for escalating interrupts in a data processing system to a higher software stack level | Richard Louis Arndt, Bruce Mealey | 2018-02-27 |
| 9892050 | Multi-stage translation of prefetch requests | Patricia M. Sagmeister | 2018-02-13 |
| 9870329 | Techniques for escalating interrupts in a data processing system | Richard Louis Arndt | 2018-01-16 |
| 9852091 | Techniques for handling interrupts in a processing unit using virtual processor thread groups and software stack levels | Richard Louis Arndt | 2017-12-26 |