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Device function disablement during vehicle motion |
Ira L. Allen |
2019-08-27 |
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Device function disablement during vehicle motion |
Ira L. Allen |
2018-08-28 |
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Device function disablement during vehicle motion |
Ira L. Allen |
2017-04-18 |
| 9270809 |
Device function disablement during vehicle motion |
Ira L. Allen |
2016-02-23 |
| 5430888 |
Pipeline utilizing an integral cache for transferring data to and from a register |
Richard T. Witek, Timothy J. Stanley, David Fenwick, Douglas J. Burns, Rebecca L. Stamm +1 more |
1995-07-04 |
| 5428794 |
Interrupting node for providing interrupt requests to a pended bus |
— |
1995-06-27 |
| 5341510 |
Commander node method and apparatus for assuring adequate access to system resources in a multiprocessor |
Richard B. Gillett, Jr. |
1994-08-23 |
| 5319791 |
System for predicting memory fault in vector processor by sensing indication signal to scalar processor to continue a next vector instruction issuance |
David Fenwick, Timothy J. Stanley |
1994-06-07 |
| 5297269 |
Cache coherency protocol for multi processor computer system |
Darrel D. Donaldson, Mark N. Howard, David A. Orbits, John M. Parchem, David Robinson |
1994-03-22 |
| 5179674 |
Method and apparatus for predicting valid performance of virtual-address to physical-address translations |
David Fenwick, Timothy J. Stanley |
1993-01-12 |
| 5148536 |
Pipeline having an integral cache which processes cache misses and loads data in parallel |
Richard T. Witek, Timothy J. Stanley, David Fenwick, Douglas J. Burns, Rebecca L. Stamm +1 more |
1992-09-15 |
| 5146597 |
Apparatus and method for servicing interrupts utilizing a pended bus |
— |
1992-09-08 |
| 5068781 |
Method and apparatus for managing multiple lock indicators in a multiprocessor computer system |
Richard B. Gillett, Jr. |
1991-11-26 |
| 4953072 |
Node for servicing interrupt request messages on a pended bus |
— |
1990-08-28 |
| 4949239 |
System for implementing multiple lock indicators on synchronous pended bus in multiprocessor computer system |
Richard B. Gillett, Jr. |
1990-08-14 |
| 4941083 |
Method and apparatus for initiating interlock read transactions on a multiprocessor computer system |
Richard B. Gillett, Jr. |
1990-07-10 |
| 4937733 |
Method and apparatus for assuring adequate access to system resources by processors in a multiprocessor computer system |
Richard B. Gillett, Jr. |
1990-06-26 |
| 4858116 |
Method and apparatus for managing multiple lock indicators in a multiprocessor computer system |
Richard B. Gillett, Jr. |
1989-08-15 |
| 4829515 |
High performance low pin count bus interface |
Darrel D. Donaldson, Richard B. Gillett, Jr. |
1989-05-09 |
| 4774422 |
High speed low pin count bus interface |
Darrel D. Donaldson, Richard B. Gillett, Jr. |
1988-09-27 |
