Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6826653 | Block data mover adapted to contain faults in a partitioned multiprocessor system | Samuel H. Duncan, Frederick C. Canter, David W. Hartwell | 2004-11-30 |
| 6711693 | Method for synchronizing plurality of time of year clocks in partitioned plurality of processors where each partition having a microprocessor configured as a multiprocessor backplane manager | David Golden | 2004-03-23 |
| 6681282 | Online control of a multiprocessor computer system | David Golden | 2004-01-20 |
| 6668335 | System for recovering data in a multiprocessor system comprising a conduction path for each bit between processors where the paths are grouped into separate bundles and routed along different paths | Scott E. Breach, John Eble, Arvind Kumar, Richard E. Kessler, David W. Hartwell | 2003-12-23 |
| 5311081 | Data bus using open drain drivers and differential receivers together with distributed termination impedances | Roger Dame, Ronald E. Nikel | 1994-05-10 |
| 5297269 | Cache coherency protocol for multi processor computer system | Mark N. Howard, David A. Orbits, John M. Parchem, David Robinson, Douglas D. Williams | 1994-03-22 |
| 5229926 | Power supply interlock for a distributed power system | Daniel Wissell | 1993-07-20 |
| 5146563 | Node with coupling resistor for limiting current flow through driver during overlap condition | Richard B. Gillett, Jr. | 1992-09-08 |
| 5111424 | Lookahead bus arbitration system with override of conditional access grants by bus cycle extensions for multicycle data transfer | Richard B. Gillett, Jr. | 1992-05-05 |
| 5034883 | Lockhead bus arbitration system with override of conditional access grants by bus cycle extensions for multicycle data transfers | Richard B. Gillett, Jr. | 1991-07-23 |
| 5003467 | Node adapted for backplane bus with default control | Richard B. Gillett, Jr. | 1991-03-26 |
| 4980854 | Lookahead bus arbitration system with override of conditional access grants by bus cycle extensions for multicycle data transfers | Richard B. Gillett, Jr. | 1990-12-25 |
| 4947368 | Lookahead bus arbitration system with override of conditional access grants by bus cycle extensions for multicycle data transfers | Richard B. Gillett, Jr. | 1990-08-07 |
| 4922449 | Backplane bus system including a plurality of nodes | Richard B. Gillett Jr. | 1990-05-01 |
| 4837736 | Backplane bus with default control | Richard B. Gillett, Jr. | 1989-06-06 |
| 4829515 | High performance low pin count bus interface | Richard B. Gillett, Jr., Douglas D. Williams | 1989-05-09 |
| 4774422 | High speed low pin count bus interface | Richard B. Gillett, Jr., Douglas D. Williams | 1988-09-27 |
| 4527074 | High voltage pass circuit | Edward H. Honnigford, Alan D. Poeppelman | 1985-07-02 |
| 4271487 | Static volatile/non-volatile ram cell | Donald G. Craycraft, George C. Lockwood | 1981-06-02 |