Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9286298 | Methods for enhancing management of backup data sets and devices thereof | — | 2016-03-15 |
| 8417746 | File system management with enhanced searchability | Michael Berger, Jonathan C. Nicklin, Bradley Cain | 2013-04-09 |
| 6374336 | Computer system and process for transferring multiple high bandwidth streams of data between multiple storage units and multiple applications in a scalable and reliable manner | Eric C. Peters, Stanley Rabinowitz, Herbert R. Jacobs, Peter Fasciano | 2002-04-16 |
| 6295585 | High-performance communication method and apparatus for write-only networks | Glenn P. Garvey, Simon C. Steely, Jr. | 2001-09-25 |
| 6049889 | High performance recoverable communication method and apparatus for write-only networks | Simon C. Steely, Jr., Glenn P. Garvey | 2000-04-11 |
| 5924122 | Method for error recovery spinlock in asymmetrically accessed multiprocessor shared memory | Wayne Cardoza, Kathleen D. Morse, Charles W. Kaufman | 1999-07-13 |
| 5829051 | Apparatus and method for intelligent multiple-probe cache allocation | Simon C. Steely, Jr., Tryggve Fossum | 1998-10-27 |
| 5426741 | Bus event monitor | H. Bruce Butts, Jr., James N. Leahy | 1995-06-20 |
| 5341510 | Commander node method and apparatus for assuring adequate access to system resources in a multiprocessor | Douglas D. Williams | 1994-08-23 |
| 5146563 | Node with coupling resistor for limiting current flow through driver during overlap condition | Darrel D. Donaldson | 1992-09-08 |
| 5111424 | Lookahead bus arbitration system with override of conditional access grants by bus cycle extensions for multicycle data transfer | Darrel D. Donaldson | 1992-05-05 |
| 5068781 | Method and apparatus for managing multiple lock indicators in a multiprocessor computer system | Douglas D. Williams | 1991-11-26 |
| 5034883 | Lockhead bus arbitration system with override of conditional access grants by bus cycle extensions for multicycle data transfers | Darrel D. Donaldson | 1991-07-23 |
| 5003467 | Node adapted for backplane bus with default control | Darrel D. Donaldson | 1991-03-26 |
| 4980854 | Lookahead bus arbitration system with override of conditional access grants by bus cycle extensions for multicycle data transfers | Darrel D. Donaldson | 1990-12-25 |
| 4949239 | System for implementing multiple lock indicators on synchronous pended bus in multiprocessor computer system | Douglas D. Williams | 1990-08-14 |
| 4947368 | Lookahead bus arbitration system with override of conditional access grants by bus cycle extensions for multicycle data transfers | Darrel D. Donaldson | 1990-08-07 |
| 4941083 | Method and apparatus for initiating interlock read transactions on a multiprocessor computer system | Douglas D. Williams | 1990-07-10 |
| 4937733 | Method and apparatus for assuring adequate access to system resources by processors in a multiprocessor computer system | Douglas D. Williams | 1990-06-26 |
| 4858116 | Method and apparatus for managing multiple lock indicators in a multiprocessor computer system | Douglas D. Williams | 1989-08-15 |
| 4837736 | Backplane bus with default control | Darrel D. Donaldson | 1989-06-06 |
| 4829515 | High performance low pin count bus interface | Darrel D. Donaldson, Douglas D. Williams | 1989-05-09 |
| 4774422 | High speed low pin count bus interface | Darrel D. Donaldson, Douglas D. Williams | 1988-09-27 |