Issued Patents All Time
Showing 25 most recent of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10811278 | Method for packaging circuits | Chia Yong Poo, Low Siu Waf, Boon Suan Jeung, Eng Meow Koon | 2020-10-20 |
| 10453704 | Method for packaging circuits | Chia Yong Poo, Low Siu Waf, Boon Suan Jeung, Eng Meow Koon | 2019-10-22 |
| 10431531 | Semiconductor dies with recesses, associated leadframes, and associated systems and methods | Yong Poo Chia | 2019-10-01 |
| 10074599 | Semiconductor dies with recesses, associated leadframes, and associated systems and methods | Yong Poo Chia | 2018-09-11 |
| 9679834 | Semiconductor dies with recesses, associated leadframes, and associated systems and methods | Yong Poo Chia | 2017-06-13 |
| 9484225 | Method for packaging circuits | Chia Yong Poo, Low Siu Waf, Boon Suan Jeung, Eng Meow Koon | 2016-11-01 |
| 8174105 | Stacked semiconductor package having discrete components | Chia Yong Poo | 2012-05-08 |
| 8138617 | Apparatus and method for packaging circuits | Chia Yong Poo, Boon Suan Jeung, Low Siu Waf, Chan Min Yu, Neo Yong Loo +4 more | 2012-03-20 |
| 8008126 | Castellation wafer level packaging of integrated circuit chips | Boon Suan Jeung, Chia Yong Poo, Low Siu Waf, Eng Meow Koon, Huang Shuang Wu +2 more | 2011-08-30 |
| 7964946 | Semiconductor package having discrete components and system containing the package | Chia Yong Poo | 2011-06-21 |
| 7807502 | Method for fabricating semiconductor packages with discrete components | Chia Yong Poo | 2010-10-05 |
| 7723831 | Semiconductor package having die with recess and discrete component embedded within the recess | Chia Yong Poo | 2010-05-25 |
| 7679179 | Castellation wafer level packaging of integrated circuit chips | Boon Suan Jeung, Chia Yong Poo, Low Siu Waf, Eng Meow Koon, Huang Shuang Wu +2 more | 2010-03-16 |
| 7675169 | Apparatus and method for packaging circuits | Chia Yong Poo, Boon Suan Jeung, Low Waf, Chan Min Yu, Neo Yong Loo +4 more | 2010-03-09 |
| 7528477 | Castellation wafer level packaging of integrated circuit chips | Boon Suan Jeung, Chia Yong Poo, Low Siu Waf, Eng Meow Koon, Huang Shuang Wu +2 more | 2009-05-05 |
| 7358154 | Method for fabricating packaged die | Chia Yong Poo, Boon Suan Jeung, Low Siu Waf, Chan Min Yu, Neo Yong Loo +4 more | 2008-04-15 |
| 7285850 | Support elements for semiconductor devices with peripherally located bond pads | Chia Yong Poo, Boon Suan Jeung, Low Siu Waf, Chan Min Yu, Neo Yong Loo | 2007-10-23 |
| 7276387 | Castellation wafer level packaging of integrated circuit chips | Boon Suan Jeung, Chia Yong Poo, Low Siu Waf, Eng Meow Koon, Huang Shuang Wu +2 more | 2007-10-02 |
| 7226809 | Semiconductor devices and semiconductor device components with peripherally located, castellated contacts, assemblies and packages including such semiconductor devices or packages and associated methods | Chia Yong Poo, Boon Suan Jeung, Low Siu Waf, Chan Min Yu, Neo Yong Loo | 2007-06-05 |
| 7115984 | Semiconductor devices including peripherally located bond pads, intermediates thereof, assemblies, and packages including the semiconductor devices, and support elements for the semiconductor devices | Chia Yong Poo, Boon Suan Jeung, Low Siu Waf, Chan Min Yu, Neo Yong Loo | 2006-10-03 |
| 6949407 | Castellation wafer level packaging of integrated circuit chips | Boon Suan Jeung, Chia Yong Poo, Low Siu Waf, Eng Meow Koon, Huang Shuang Wu +2 more | 2005-09-27 |
| 6894386 | Apparatus and method for packaging circuits | Chia Yong Poo, Boon Suan Jeung, Low Siu Waf, Chan Min Yu, Neo Yong Loo +4 more | 2005-05-17 |
| 6855572 | Castellation wafer level packaging of integrated circuit chips | Boon Suan Jeung, Chia Yong Poo, Low Siu Waf, Eng Meow Koon, Huang Shuang Wu +2 more | 2005-02-15 |
| 6818977 | Semiconductor devices and semiconductor device components with peripherally located, castellated contacts, assemblies and packages including such semiconductor devices or packages | Chia Yong Poo, Boon Suan Jeung, Low Siu Waf, Chan Min Yu, Neo Yong Loo | 2004-11-16 |
| 6727116 | Semiconductor devices including peripherally located bond pads, assemblies, packages, and methods | Chia Yong Poo, Boon Suan Jeung, Low Siu Waf, Chan Min Yu, Neo Yong Loo | 2004-04-27 |