Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9047079 | Indicating disabled thread to other threads when contending instructions complete execution to ensure safe shared resource condition | Giles R. Frazier, Bradly G. Frey, Kumar K. Gala, Cathy May, Michael D. Snyder +2 more | 2015-06-02 |
| 8615644 | Processor with hardware thread control logic indicating disable status when instructions accessing shared resources are completed for safe shared resource condition | Giles R. Frazier, Bradly G. Frey, Kumar K. Gala, Cathy May, Michael D. Snyder +2 more | 2013-12-24 |
| 7941499 | Interprocessor message transmission via coherency-based interconnect | Sanjay Deshpande, Michael D. Snyder, Gary L. Whisenhunt, Kumar K. Gala | 2011-05-10 |
| 7702881 | Method and system for data transfers across different address spaces | Michael D. Snyder, Gary L. Whisenhunt, Kumar K. Gala | 2010-04-20 |