Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6286095 | Computer apparatus having special instructions to force ordered load and store operations | Dale Morris, Michael L. Ziegler, Jerome C. Huck, Stephen G. Burger, Ruby B. Lee +2 more | 2001-09-04 |
| 6079012 | Computer that selectively forces ordered execution of store and load operations between a CPU and a shared memory | Dale Morris, Bernard L. Stumpf, Jeffrey D. Kurtze, Stephen G. Burger, Ruby B. Lee +1 more | 2000-06-20 |
| 5175829 | Method and apparatus for bus lock during atomic computer operations | Bernard L. Stumpf, George M. Stabler, Richard G. Bahr, Stephen J. Ciavaglia, Hugh C. Lauer | 1992-12-29 |
| 5167022 | Multiprocessor bus locking system with a winning processor broadcasting an ownership signal causing all processors to halt their requests | Richard G. Bahr, Andrew Milia | 1992-11-24 |
| 5051885 | Data processing system for concurrent dispatch of instructions to multiple functional units | John S. Yates, Jr., Stephen J. Ciavaglia, John C. Manton, Michael Kahaiyan, Richard G. Bahr | 1991-09-24 |
| 4860244 | Buffer system for input/output portion of digital data processing system | William F. Bruckert, James Volney Lacy | 1989-08-22 |
| 4755936 | Apparatus and method for providing a cache memory unit with a write operation utilizing two system clock cycles | Robert E. Stewart, James B. Keller | 1988-07-05 |
| 4449183 | Arbitration scheme for a multiported shared functional device for use in multiprocessing systems | John J. Grady, III, Peter J. Rado | 1984-05-15 |
| 4290133 | System timing means for data processing system | Robert E. Stewart, David Potter | 1981-09-15 |