AS

Anindya Saha

SP Saankhya Labs Pvt.: 12 patents #2 of 32Top 7%
TI Texas Instruments: 4 patents #3,281 of 12,488Top 30%
TL Tejas Networks Limited: 1 patents #22 of 68Top 35%
Overall (All Time): #188,540 of 4,157,543Top 5%
22
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12238568 System and method for provisioning a portable virtual RAN across a plurality of RAN hardware platforms Parag Naik, Makarand Kulkami, Hemant Mallapur, Susmit Kumar Datta, Sandeep Pendharkar +2 more 2025-02-25
12052583 Radio mapping architecture for applying machine learning techniques to wireless radio access networks Arindam Chakraborty, Parag Naik, Vishwakumara Kayargadde, Susmit Kumar Datta 2024-07-30
11963042 System and method for offloading traffic from a cellular network to a broadcast network Arindam Chakraborty, Makarand Ramkrishna Kulkarni, Gururaj Padaki, Parag Naik, Preetham Uthaiah 2024-04-16
11895530 System and method for out-of-order transmission stream of content via ambient intelligent one-to-many transmission mode Parag Naik, Arindam Chakraborty, Preetham Uthaiah, Sandeep Pendharkar, Yogesh Singh +1 more 2024-02-06
11544042 Deploying a radio access network containerized network function (RAN CNF) that is portable across a plurality of RAN hardware platforms Parag Naik, Sandeep Pendharkar, Venugopal Kolathur 2023-01-03
11259209 System and method for dynamically switching transmission of data from cellular to unidirectional point-to-multipoint network Parag Naik, Arindam Chakraborty, Makarand Ramkrishna Kulkarni, Vishwakumara Kayargadde, Mark A. AITKEN 2022-02-22
11240678 System and method for improving indoor coverage of cellular reception using a smart television Parag Naik, Gururaj Padaki 2022-02-01
10904791 System and method for offloading data and video traffic to a supplemental downlink overlay network Parag Naik, Arindam Chakraborty, Vishwakumara Kayargadde 2021-01-26
10014904 System and method for mitigating co-channel interference in white space modems Sudeep Mirpadi Anand, Shrinivas Bhat 2018-07-03
9949277 System and method for mitigating co-channel interference in white space modems using interference aware techniques Sudeep Mirpadi Anand, Shrinivas Bhat 2018-04-17
9762441 Method and system of dynamically designing and operating an optimal communication network configuration Vishwakumara Kayargadde, Parag Naik, Sunil Ramesh 2017-09-12
9467337 Method and system of registering a user device with a dynami-cally self-optimizing communication network Vishwakumara Kayargadde, Parag Naik, Sunil Ramesh 2016-10-11
9092227 Vector slot processor execution unit for high speed streaming inputs Gururaj Padaki, Santosh Billava, Rakesh A. Joshi 2015-07-28
8812569 Digital filter implementation for exploiting statistical properties of signal and coefficients Parag Naik, Gururaj Padaki, Subrahmanya Kondageri Shankaraiah, Saurabh Mishra 2014-08-19
8788549 Zero overhead block floating point implementation in CPU's Gururaj Padaki, Parag Naik, Vishwakumara Kayargadde, Sunil Hr 2014-07-22
8571119 Software defined radio for modulation and demodulation of multiple communication standards Parag Naik, Hemant Mallapur, Sunil Hr, Gururaj Padaki 2013-10-29
8447961 Mechanism for efficient implementation of software pipelined loops in VLIW processors Manish Kumar, Hemant Mallapur, Santhosh Billava, Viji Rajangam 2013-05-21
8255780 Scalable VLIW processor for high-speed viterbi and trellis coded modulation decoding Hemant Mallapur, Santhosh Billava, Smitha Banavikal Math Veerabhadresh 2012-08-28
7423475 Providing optimal supply voltage to integrated circuits Vivek G. Pawar, Sudheer Prasad, Anmol Sharma, Suresh R. Puthucode 2008-09-09
7213184 Testing of modules operating with different characteristics of control signals using scan based techniques Nikila Krishnamoorthy, Rubin Ajit Parekhji 2007-05-01
7200690 Memory access system providing increased throughput rates when accessing large volumes of data by determining worse case throughput rate delays Rakshit Kumar Singhal 2007-04-03
7134061 At-speed ATPG testing and apparatus for SoC designs having multiple clock domain using a VLCT test platform Anupama Aniruddha Agashe, Nikila Krishnamoorthy, Rubin Ajit Parekhji 2006-11-07