AC

Andrew Mark Chapman

CS Cadence Design Systems: 10 patents #117 of 2,263Top 6%
Overall (All Time): #486,278 of 4,157,543Top 15%
10
Patents All Time

Issued Patents All Time

Showing 1–10 of 10 patents

Patent #TitleCo-InventorsDate
12430489 Restructuring algorithm for including user-specified clock instances in a post-CTS clock tree Ruth Patricia Jackson, Charles J. Alpert 2025-09-30
12423501 Skewing level limited clock tree Charles J. Alpert, Andrew Hall 2025-09-23
12061857 Post-CTS insertion delay and skew target reformulation of clock tree Charles J. Alpert, Andrew Hall 2024-08-13
11620428 Post-CTS clock tree restructuring Zhuo Li 2023-04-04
11354479 Post-CTS clock tree restructuring with ripple move Zhuo Li 2022-06-07
10963617 Modifying route topology to fix clock tree violations William Robert Reece, Natarajan Viswanathan, Mehmet Can Yildiz, Gracieli Posser, Zhuo Li 2021-03-30
10936783 Runtime efficient circuit placement search location selection Zhuo Li 2021-03-02
10885250 Clock gate placement with data path awareness David White, Thomas Andrew Newton, Zhuo Li 2021-01-05
10769345 Clock tree optimization by moving instances toward core route Zhuo Li 2020-09-08
10740530 Clock tree wirelength reduction based on a target offset in connected routes Zhuo Li 2020-08-11