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Integrated circuit development using machine learning-based prediction of power, performance, and area |
Tuhin Mahmud, Saiful Islam, Geoffrey Wang |
2023-10-03 |
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Bias-controlled bit-line sensing scheme for eDRAM |
Donald W. Plass |
2020-02-11 |
| 9748958 |
Dynamic high voltage driver with adjustable clamped output level |
Gregory J. Fredeman, Donald W. Plass, Kenneth J. Reyer |
2017-08-29 |
| 9224437 |
Gated-feedback sense amplifier for single-ended local bit-line memories |
John E. Barth, Jr., Donald W. Plass, Kenneth J. Reyer |
2015-12-29 |
| 9053770 |
Dynamic cascode-managed high-voltage word-line driver circuit |
Gregory J. Fredeman, Donald W. Plass, Kenneth J. Reyer |
2015-06-09 |
| 9047930 |
Single-ended low-swing power-savings mechanism with process compensation |
Gregory J. Fredeman, Donald W. Plass, Vinod Ramadurai |
2015-06-02 |
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Dynamic cascode-managed high-voltage word-line driver circuit |
Gregory J. Fredeman, Donald W. Plass, Kenneth J. Reyer |
2015-05-05 |
| 8138820 |
Peak power reduction methods in distributed charge pump systems |
Fadi H. Gebara, Jente B. Kuang |
2012-03-20 |
| 8102194 |
Dual frequency divider having phase-shifted inputs and outputs |
Fadi H. Gebara, Jente B. Kuang |
2012-01-24 |
| 7994845 |
Switched-capacitor charge pumps |
Fadi H. Gebara, Jente B. Kuang |
2011-08-09 |
| 7847618 |
Peak power reduction methods in distributed charge pump systems |
Fadi H. Gebara, Jente B. Kuang |
2010-12-07 |
| 7760010 |
Switched-capacitor charge pumps |
Fadi H. Gebara, Jente B. Kuang |
2010-07-20 |
| 7414436 |
Limited switch dynamic logic cell based register |
Peter Juergen Klim, Jethro C. Law, Trong V. Luong |
2008-08-19 |