Issued Patents All Time
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10615071 | Structure having isolated deep substrate vias with decreased pitch and increased aspect ratio and related method | David J. Howard | 2020-04-07 |
| 10615072 | Structure having isolated deep substrate vias with decreased pitch and increased aspect ratio and related method | David J. Howard | 2020-04-07 |
| 9887123 | Structure having isolated deep substrate vias with decreased pitch and increased aspect ratio and related method | David J. Howard | 2018-02-06 |
| 9458011 | Scalable self-supported MEMS structure and related method | David J. Howard, Michael J. DeBar, Jeff Rose | 2016-10-04 |
| 9377350 | Light sensor with chemically resistant and robust reflector stack | David J. Howard, Jeff Rose, Michael J. DeBar | 2016-06-28 |
| 9346669 | Robust MEMS structure with via cap and related method | David J. Howard, Michael J. DeBar, Jeff Rose | 2016-05-24 |
| 9136157 | Deep N wells in triple well structures | Marco Racanelli, Jinshu Zhang | 2015-09-15 |
| 9105681 | Method for forming deep silicon via for grounding of circuits and devices, emitter ballasting and isolation | Volker Blaschke, Todd Thibeault, Chris Cureton, Paul D. Hurwitz, David J. Howard +1 more | 2015-08-11 |
| 8598713 | Deep silicon via for grounding of circuits and devices, emitter ballasting and isolation | Volker Blaschke, Todd Thibeault, Chris Cureton, Paul D. Hurwitz, David J. Howard +1 more | 2013-12-03 |
| 8212331 | Method for fabricating a backside through-wafer via in a processed wafer and related structure | Marco Racanelli, David J. Howard | 2012-07-03 |
| 8098351 | Self-planarized passivation dielectric for liquid crystal on silicon structure and related method | — | 2012-01-17 |
| 7897484 | Fabricating a top conductive layer in a semiconductor die | Marco Racanelli, David J. Howard | 2011-03-01 |
| 7772673 | Deep trench isolation and method for forming same | Kevin Q. Yin, Amol Kalburge, David J. Howard, Dieter Dornisch | 2010-08-10 |
| 7704874 | Method for fabricating a frontside through-wafer via in a processed wafer and related structure | Marco Racanelli, David J. Howard | 2010-04-27 |
| 7589009 | Method for fabricating a top conductive layer in a semiconductor die and related structure | Marco Racanelli, David J. Howard | 2009-09-15 |
| 7078310 | Method for fabricating a high density composite MIM capacitor with flexible routing in semiconductor dies | Marco Racanelli, Paul Kempf | 2006-07-18 |
| 7052966 | Deep N wells in triple well structures and method for fabricating same | Marco Racanelli, Jinshu Zhang | 2006-05-30 |
| 7041569 | Method for fabricating a high density composite MIM capacitor with reduced voltage dependence in semiconductor dies | Marco Racanelli, David J. Howard | 2006-05-09 |
| 6777777 | High density composite MIM capacitor with flexible routing in semiconductor dies | Marco Racanelli, Paul Kempf | 2004-08-17 |
| 6680521 | High density composite MIM capacitor with reduced voltage dependence in semiconductor dies | Marco Racanelli, David J. Howard | 2004-01-20 |
| 6430028 | Method for fabrication of an MIM capacitor and related structure | Marco Racanelli | 2002-08-06 |
| 6411492 | Structure and method for fabrication of an improved capacitor | Phil N. Sherman | 2002-06-25 |