Issued Patents All Time
Showing 101–125 of 148 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9569278 | Asymmetric performance multicore architecture with same instruction set architecture | Sanjeev Jahagirdar, Deborah T. Marr | 2017-02-14 |
| 9280172 | Method, apparatus, and system for optimizing frequency and performance in a multidie microprocessor | Jose P. Allarey, Sanjeev Jahagirdar, Oren Lamdan | 2016-03-08 |
| 9274592 | Technique for preserving cached information during a low power mode | Sanjeev Jahagirdar, Jose P. Allarey | 2016-03-01 |
| 9255967 | System and method for measuring an integrated circuit age | Rubil Ahmadi, Suhas Satheesh | 2016-02-09 |
| 9235258 | Method and apparatus for a zero voltage processor | Sanjeev Jahagirdar, John B. Conrad, Robert Milstrey, Stephen A. Fischer, Alon Naveh +1 more | 2016-01-12 |
| 9223390 | Method and apparatus for a zero voltage processor | Sanjeev Jahagirdar, John B. Conrad, Robert Milstrey, Stephen A. Fischer, Alon Naveh +1 more | 2015-12-29 |
| 9223389 | Method and apparatus for a zero voltage processor | Sanjeev Jahagirdar, John B. Conrad, Robert Milstrey, Stephen A. Fischer, Alon Naveh +1 more | 2015-12-29 |
| 9141180 | Method and apparatus for a zero voltage processor sleep state | Sanjeev Jahagirdar, John B. Conrad, Robert Milstrey, Stephen A. Fischer, Alon Naveh +1 more | 2015-09-22 |
| 9122464 | Method, apparatus, and system for energy efficiency and energy conservation including energy efficient processor thermal throttling using deep power down mode | Inder M. Sodhi, Efraim Rotem, Alon Naveh, Sanjeev Jahagirdar | 2015-09-01 |
| 8892861 | Method and apparatus for establishing safe processor operating points | Stephen A. Fischer, Sanjeev Jahagirdar, Stephen H. Gunther | 2014-11-18 |
| 8850178 | Method and apparatus for establishing safe processor operating points | Stephen A. Fischer, Sanjeev Jahagirdar, Stephen H. Gunther | 2014-09-30 |
| 8819461 | Method, apparatus, and system for energy efficiency and energy conservation including improved processor core deep power down exit latency by using register secondary uninterrupted power supply | Inder M. Sodhi, Alon Naveh, Michael Zelikson, Sanjeev Jahagirdar | 2014-08-26 |
| 8806248 | Method, apparatus, and system for optimizing frequency and performance in a multidie microprocessor | Jose P. Allarey, Sanjeev Jahagirdar, Oren Lamdan, Ofer Nathan, Tomer Ziv | 2014-08-12 |
| 8769323 | Method, apparatus, and system for optimizing frequency and performance in a multidie microprocessor | Jose P. Allarey, Sanjeev Jahagirdar, Oren Lamdan, Ofer Nathan, Tomer Ziv | 2014-07-01 |
| 8732399 | Technique for preserving cached information during a low power mode | Sanjeev Jahagirdar, Jose P. Allarey | 2014-05-20 |
| 8707062 | Method and apparatus for powered off processor core mode | Sanjeev Jahagirdar, John B. Conrad, Robert Milstrey, Stephen A. Fischer, Alon Naveh +1 more | 2014-04-22 |
| 8560871 | Method, apparatus, and system for optimizing frequency and performance in a multidie microprocessor | Jose P. Allarey, Sanjeev Jahagirdar, Oren Lamdan, Nathan Ofer, Tomer Ziv | 2013-10-15 |
| 8527709 | Technique for preserving cached information during a low power mode | Sanjeev Jahagirdar, Jose P. Allarey | 2013-09-03 |
| 8516285 | Method, apparatus and system to dynamically choose an optimum power state | Sanjeev Jahagirdar, Jose P. Allarey, Eric Heit | 2013-08-20 |
| 8356197 | Method, apparatus, and system for optimizing frequency and performance in a multidie microprocessor | Jose P. Allarey, Sanjeev Jahagirdar, Oren Lamdan, Nathan Ofer, Tomer Ziv | 2013-01-15 |
| 8131989 | Method and apparatus for establishing safe processor operating points | Stephen A. Fischer, Sanjeev Jahagirdar, Stephen H. Gunther | 2012-03-06 |
| 8065555 | System and method for error correction in cache units | Subramaniam Maiyuran, Vladimir Pentkovski, Sanjib Sarkar, Marina Sherman | 2011-11-22 |
| 8032772 | Method, apparatus, and system for optimizing frequency and performance in a multi-die microprocessor | Jose P. Allarey, Sanjeev Jahagirdar, Oren Lamdan, Ofer Nathan, Tomer Ziv | 2011-10-04 |
| 7917787 | Method, apparatus and system to dynamically choose an aoptimum power state | Sanjeev Jahagirdar, Jose P. Allarey, Eric Heit | 2011-03-29 |
| 7664891 | Modular data transfer architecture | — | 2010-02-16 |