Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12417331 | Systems and methods for circuit design dependent programmable maximum junction temperatures | Archanna Srinivasan, Rajiv K. Mongia, Ravi Prakash Gutala, Kaushik Chanda, Gurvinder Tiwana +1 more | 2025-09-16 |
| 10048306 | Methods and apparatus for automated integrated circuit package testing | Srikanth Darbha, Ronald M. Beach, Ganesh Sure, Kaushik Chanda | 2018-08-14 |
| 8212353 | Structure and assembly procedure for low stress thin die flip chip packages designed for low-K Si and thin core substrate | Wen-chou Vincent Wang, Yuan-Liang Li, Bruce Euzent | 2012-07-03 |
| 7741160 | Structure and assembly procedure for low stress thin die flip chip packages designed for low-K Si and thin core substrate | Wen-chou Vincent Wang, Yuan-Liang Li, Bruce Euzent | 2010-06-22 |
| 7585702 | Structure and assembly procedure for low stress thin die flip chip packages designed for low-K Si and thin core substrate | Wen-chou Vincent Wang, Yuan-Liang Li, Bruce Euzent | 2009-09-08 |
| 7210081 | Apparatus and methods for assessing reliability of assemblies using programmable logic devices | Bruce Euzent, Roy Wu, Jeffrey Wayne Barton, Anil Pannikkat, Tomas Jonsson | 2007-04-24 |