TR

Ted Rossin

IN Intel: 2 patents #13,213 of 30,777Top 45%
Overall (All Time): #1,994,805 of 4,157,543Top 50%
2
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
9824754 Techniques for determining victim row addresses in a volatile memory Sreenivas Mandava, Brian S. Morris, Suneeta Sah, Roy M. Stevens, Mathew W. Stefaniw +1 more 2017-11-21
9269436 Techniques for determining victim row addresses in a volatile memory Sreenivas Mandava, Brian S. Morris, Suneeta Sah, Roy M. Stevens, Mathew W. Stefaniw +1 more 2016-02-23