Issued Patents All Time
Showing 26–50 of 70 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10956160 | Method and apparatus for a multi-level reservation station with instruction recirculation | Mark Dechene, Matthew C. Merten, Ammon Christiansen | 2021-03-23 |
| 10929176 | Method of efficiently migrating data from one tier to another with suspend and resume capability | Ramprasad Chinthekindi, Abhinav Duggal, Lan Bai | 2021-02-23 |
| 10924095 | Multi-resonant coupling architectures for ZZ interaction reduction | David C. Mckay, Abhinav Kandala | 2021-02-16 |
| 10915328 | Apparatus and method for a high throughput parallel co-processor and interconnect with low offload latency | Jonathan Pearce, David Sheffield, Jeffrey J. Cook, Deborah T. Marr | 2021-02-09 |
| 10896141 | Gather-scatter cache architecture having plurality of tag and data banks and arbiter for single program multiple data (SPMD) processor | Jeffrey J. Cook, Jonathan Pearce, Rishiraj A. Bheda, David Sheffield, Abhijit Davare +1 more | 2021-01-19 |
| 10873325 | Robust noise immune, low-skew, pulse width retainable glitch-filter | Jhankar Malakar, Devraj Matharampallil Rajagopal | 2020-12-22 |
| 10831505 | Architecture and method for data parallel single program multiple data (SPMD) execution | Jonathan Pearce, David Sheffield, Jeffrey J. Cook, Deborah T. Marr, Abhijit Davare +1 more | 2020-11-10 |
| 10776110 | Apparatus and method for adaptable and efficient lane-wise tensor processing | Jonathan Pearce, David Sheffield, Jeffrey J. Cook, Deborah T. Marr, Abhijit Davare +6 more | 2020-09-15 |
| 10763839 | Buffer Circuit | Rajat Chauhan | 2020-09-01 |
| 10713217 | Method and system to managing persistent storage using perfect hashing | Ramprasad Chinthekindi, Abhinav Duggal | 2020-07-14 |
| 10673436 | Failsafe device | Bharat Gajanan Hegde, Devraj Matharampallil Rajagopal | 2020-06-02 |
| 10666257 | Failsafe, ultra-wide voltage input output interface using low-voltage gate oxide transistors | Devraj Matharampallil Rajagopal | 2020-05-26 |
| 10649807 | Method to check file data integrity and report inconsistencies with bulk data movement | Ramprasad Chinthekindi, Abhinav Duggal, Lan Bai | 2020-05-12 |
| 10534747 | Technologies for providing a scalable architecture for performing compute operations in memory | Shigeki Tomishima, Chetan Chauhan, Rajesh Sundaram, Jawad B. Khan | 2020-01-14 |
| 10418098 | Methods and systems for performing a calculation across a memory array | Shigeki Tomishima | 2019-09-17 |
| 10235180 | Scheduler implementing dependency matrix having restricted entries | Matthew C. Merten, Bambang Sutanto, Rahul Kulkarni, Justin M. Deinlein, James Hadley | 2019-03-19 |
| 9904553 | Method and apparatus for implementing dynamic portbinding within a reservation station | Bambang Sutanto, Matthew C. Merten, Chia Yin Kevin Lai, Ammon Christiansen, Justin M. Deinlein | 2018-02-27 |
| 9798590 | Post-retire scheme for tracking tentative accesses during transactional execution | Haitham Akkary, Ravi Rajwar | 2017-10-24 |
| 9652236 | Instruction and logic for non-blocking register reclamation | Mark Dechene, Yury N. Ilin, Justin M. Deinlein, Christine E. Wang, Matthew C. Merten | 2017-05-16 |
| 9495159 | Two level re-order buffer | Mark Dechene, Matthew C. Merten, Tong Li, Christine E. Wang | 2016-11-15 |
| 9372698 | Method and apparatus for implementing dynamic portbinding within a reservation station | Bambang Sutanto, Matthew C. Merten, Chia Yin Kevin Lai, Ammon Christiansen, Justin M. Deinlein | 2016-06-21 |
| 9354875 | Enhanced loop streaming detector to drive logic optimization | Matthew C. Merten, Justin M. Deinlein, Yury N. Ilin, Alexandre J. Farcy, Tong Li | 2016-05-31 |
| 9305049 | Addressing cross-allocated blocks in a file system | Kalyan C. Gunda | 2016-04-05 |
| 9304163 | Methodology for testing integrated circuits | Sagar Bhogela, Daisy Cynthia | 2016-04-05 |
| 9262173 | Critical section detection and prediction mechanism for hardware lock elision | Haitham Akkary, Ravi Rajwar | 2016-02-16 |