Issued Patents All Time
Showing 26–45 of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10748238 | Frequent data value compression for graphics processing units | Abhishek Venkatesh, Travis T. Schluessler, Prasoonkumar Surti, Altug Koker, Aravindh Anantaraman +9 more | 2020-08-18 |
| 10748242 | Low granularity coarse depth test efficiency enhancement | Vasanth Ranganathan, Saikat Mandal, Karol A. Szerszen, Vamsee Vardhan Chivukula, Abhishek R. Appu +3 more | 2020-08-18 |
| 10546362 | Method and apparatus for adaptive pixel hashing for graphics processors | Kalyan Kumar BHIRAVABHATLA, Subramaniam Maiyuran, Jorge F. Garcia Pabon | 2020-01-28 |
| 10424107 | Hierarchical depth buffer back annotaton | Vasanth Ranganathan, Saikat Mandal, Vamsee Vardhan Chivukula, Karol A. Szerszen, Aleksander Olek Neyman +7 more | 2019-09-24 |
| 10417730 | Single input multiple data processing mechanism | Subramaniam Maiyuran, Jorge F. Garcia Pabon, Vikranth Vemulapalli, Chandra Gurram, Aditya Navale | 2019-09-17 |
| 10369989 | Parking assistance system and method for controlling the same | Alok Miglani, Arijit Mandal, Rajeev Ranjan | 2019-08-06 |
| 10262388 | Frequent data value compression for graphics processing units | Abhishek Venkatesh, Travis T. Schluessler, Prasoonkumar Surti, Altug Koker, Aravindh Anantaraman +9 more | 2019-04-16 |
| 10146691 | System and method for performing partial cache line writes without fill-reads or byte enables | Hashem Hashemi, Altug Koker | 2018-12-04 |
| 10140678 | Specialized code paths in GPU processing | Abhishek Ventakesh, Travis T. Schluessler, Thomas Raoux, Rahul P. Sathe, Jon N. Hasselgren | 2018-11-27 |
| 10122723 | Supervised contact list for user accounts | Austin Chang, Eider Silva de Oliveira, Gregory C. Scott, Amar S. Gandhi | 2018-11-06 |
| 10102609 | Low granularity coarse depth test efficiency enhancement | Vasanth Ranganathan, Saikat Mandal, Karol A. Szerszen, Vamsee Vardhan Chivukula, Abhishek R. Appu +3 more | 2018-10-16 |
| 10068249 | Inventory forecasting for bidded ad exchange | Liang Wei, Sumedh A. Kanetkar, Timothy Wee, Weifeng Aaron Lin | 2018-09-04 |
| 9846962 | Optimizing clipping operations in position only shading tile deferred renderers | Kalyan Kumar BHIRAVABHATLA, Subramaniam Maiyuran | 2017-12-19 |
| 9836809 | Method and apparatus for adaptive pixel hashing for graphics processors | Kalyan Kumar BHIRAVABHATLA, Subramaniam Maiyuran, Jorge F. Garcia Pabon | 2017-12-05 |
| 9824412 | Position-only shading pipeline | Subramaniam Maiyuran, Thomas A. Piazza, Kalyan Kumar BHIRAVABHATLA, Peter L. Doyle, Paul A. Johnson +7 more | 2017-11-21 |
| 9268691 | Fast mechanism for accessing 2n±1 interleaved memory system | Altug Koker, Aditya Navale | 2016-02-23 |
| 9183056 | Expanding memory size | David Alan Hepkin, Satya P. Sharma, Randall Craig Swanberg | 2015-11-10 |
| 8875107 | Component lock tracing by associating component type parameters with particular lock instances | Juan M. Casas, JR., Basu Vaidyanathan | 2014-10-28 |
| 8458431 | Expanding memory size | David Alan Hepkin, Satya P. Sharma, Randal C. Swanberg | 2013-06-04 |
| 8429621 | Component lock tracing by associating component type parameters with particular lock instances | Juan M. Casas, JR., Basu Vaidyanathan | 2013-04-23 |