Issued Patents All Time
Showing 101–125 of 136 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9223389 | Method and apparatus for a zero voltage processor | Varghese George, John B. Conrad, Robert Milstrey, Stephen A. Fischer, Alon Naveh +1 more | 2015-12-29 |
| 9223390 | Method and apparatus for a zero voltage processor | Varghese George, John B. Conrad, Robert Milstrey, Stephen A. Fischer, Alon Naveh +1 more | 2015-12-29 |
| 9141180 | Method and apparatus for a zero voltage processor sleep state | Varghese George, John B. Conrad, Robert Milstrey, Stephen A. Fischer, Alon Naveh +1 more | 2015-09-22 |
| 9122464 | Method, apparatus, and system for energy efficiency and energy conservation including energy efficient processor thermal throttling using deep power down mode | Inder M. Sodhi, Efraim Rotem, Alon Naveh, Varghese George | 2015-09-01 |
| 9081575 | Method and apparatus for a zero voltage processor sleep state | Jose P. Allarey | 2015-07-14 |
| 9081577 | Independent control of processor core retention states | Shuan M. Conrad, Stephen H. Gunther, Jeremy J. Shrall, Anant Deval | 2015-07-14 |
| 8892861 | Method and apparatus for establishing safe processor operating points | Stephen A. Fischer, Varghese George, Stephen H. Gunther | 2014-11-18 |
| 8874949 | Method, apparatus, and system for energy efficiency and energy conservation including enhanced temperature based voltage control | Ryan D. Wells, Uzi Sasson, Inder M. Sodhi | 2014-10-28 |
| 8850178 | Method and apparatus for establishing safe processor operating points | Stephen A. Fischer, Varghese George, Stephen H. Gunther | 2014-09-30 |
| 8819461 | Method, apparatus, and system for energy efficiency and energy conservation including improved processor core deep power down exit latency by using register secondary uninterrupted power supply | Inder M. Sodhi, Alon Naveh, Michael Zelikson, Varghese George | 2014-08-26 |
| 8806248 | Method, apparatus, and system for optimizing frequency and performance in a multidie microprocessor | Jose P. Allarey, Varghese George, Oren Lamdan, Ofer Nathan, Tomer Ziv | 2014-08-12 |
| 8769323 | Method, apparatus, and system for optimizing frequency and performance in a multidie microprocessor | Jose P. Allarey, Varghese George, Oren Lamdan, Ofer Nathan, Tomer Ziv | 2014-07-01 |
| 8732399 | Technique for preserving cached information during a low power mode | Varghese George, Jose P. Allarey | 2014-05-20 |
| 8713256 | Method, apparatus, and system for energy efficiency and energy conservation including dynamic cache sizing and cache operating voltage management for optimal power performance | Inder M. Sodhi, Satish K. Damaraju, Ryan D. Wells | 2014-04-29 |
| 8707062 | Method and apparatus for powered off processor core mode | Varghese George, John B. Conrad, Robert Milstrey, Stephen A. Fischer, Alon Naveh +1 more | 2014-04-22 |
| 8707066 | Method and apparatus for a zero voltage processor sleep state | Jose P. Allarey | 2014-04-22 |
| 8560871 | Method, apparatus, and system for optimizing frequency and performance in a multidie microprocessor | Jose P. Allarey, Varghese George, Oren Lamdan, Nathan Ofer, Tomer Ziv | 2013-10-15 |
| 8527709 | Technique for preserving cached information during a low power mode | Varghese George, Jose P. Allarey | 2013-09-03 |
| 8516285 | Method, apparatus and system to dynamically choose an optimum power state | Varghese George, Jose P. Allarey, Eric Heit | 2013-08-20 |
| 8356197 | Method, apparatus, and system for optimizing frequency and performance in a multidie microprocessor | Jose P. Allarey, Varghese George, Oren Lamdan, Nathan Ofer, Tomer Ziv | 2013-01-15 |
| 8131989 | Method and apparatus for establishing safe processor operating points | Stephen A. Fischer, Varghese George, Stephen H. Gunther | 2012-03-06 |
| 8122270 | Voltage stabilization for clock signal frequency locking | Jose P. Allarey, Ivan Herrera | 2012-02-21 |
| 8032772 | Method, apparatus, and system for optimizing frequency and performance in a multi-die microprocessor | Jose P. Allarey, Varghese George, Oren Lamdan, Ofer Nathan, Tomer Ziv | 2011-10-04 |
| 8028181 | Processor power consumption control and voltage drop via micro-architectural bandwidth throttling | Edward Gamsaragan, Scott E. Siers | 2011-09-27 |
| 7953993 | Method and apparatus for a zero voltage processor sleep state | Jose P. Allarey | 2011-05-31 |