Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10198333 | Test, validation, and debug architecture | Mark B. Trobough, Keshavan Tiruvallur, Chinna Prudvi, Christian Iovin, David W. Grawrock +37 more | 2019-02-05 |
| 10009339 | System, apparatus and method for securely protecting a processor in transit | Sergiu D. Ghetie, Neeraj Upasani, Vijaya K. Boddu, Kenneth D. Young, Daniel Borkowski +2 more | 2018-06-26 |
| 9696350 | Non-linear control for voltage regulator | Edward A. Burton, Gerhard Schrom, Michael W. Rogers, Alexander Lyakhov, Ravi Sankar Vunnam +8 more | 2017-07-04 |
| 7711898 | Register alias table cache to map a logical register to a physical register | Avinash Sodani, Stephan Jourdan | 2010-05-04 |
| 7463992 | Method and system to self-test single and multi-core CPU systems | Victor Zia, Michael J. Tripp | 2008-12-09 |
| 7363430 | Determination of cache entry for future operation | Avinash Sodani | 2008-04-22 |
| 7193427 | Method and apparatus for measuring relative, within-die leakage current and/or providing a temperature variation profile using a leakage inverter and ring oscillator | Marijan Persun | 2007-03-20 |
| 6891442 | Ring oscillator gates in a matrix for aberrant logic gate timing detection | Andrew Allen, Robert M. Spencer | 2005-05-10 |
| 6737880 | Device and method for probing instantaneous high-speed local supply voltage fluctuation in VLSI integrated circuits using IR emissions | Paul D. Madland, Gary Woods | 2004-05-18 |
| 6677783 | High-speed, state-preserving, race-reducing, wide-pulsed-clock domino design style | — | 2004-01-13 |
| 6535013 | Parameter variation probing technique | — | 2003-03-18 |