Issued Patents All Time
Showing 26–50 of 56 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7425844 | Input buffer for multiple differential I/O standards | Jonathan Chung, In Whan Kim, Chiakang Sung, Bonnie I. Wang, Xiaobao Wang +5 more | 2008-09-16 |
| 7391236 | Distributed memory in field-programmable gate array integrated circuit devices | David Lewis, Paul Leventis, Vaughn Betz, Thomas Yau-Tsun Wong, Andy L. Lee | 2008-06-24 |
| 7321518 | Apparatus and methods for providing redundancy in integrated circuits | Joseph Huang, Chiakang Sung, Yan Chong | 2008-01-22 |
| 7315188 | Programmable high speed interface | Bonnie Wang, Chiakang Sung, Joseph Huang, Khai Nguyen | 2008-01-01 |
| 7231536 | Control circuit for self-compensating delay chain for multiple-data-rate interfaces | Yan Chong, Chiakang Sung, Joseph Huang | 2007-06-12 |
| 7227395 | High-performance memory interface circuit architecture | Joseph Huang, Chiakang Sung, Yan Chong, Andy L. Lee, Brian Johnson | 2007-06-05 |
| 7215143 | Input buffer for multiple differential I/O standards | Jonathan Chung, In Whan Kim, Chiakang Sung, Bonnie I. Wang, Xiaobao Wang +5 more | 2007-05-08 |
| 7205806 | Loop circuitry with low-pass noise filter | Yan Chong, Joseph Huang, Chiakang Sung, Tzung-Chin Chang | 2007-04-17 |
| 7200769 | Self-compensating delay chain for multiple-date-rate interfaces | Yan Chong, Chiakang Sung, Bonnie I. Wang, Joseph Huang, Xiaobao Wang +1 more | 2007-04-03 |
| 7167023 | Multiple data rate interface architecture | Chiakang Sung, Joseph Huang, Yan Chong, Bonnie I. Wang | 2007-01-23 |
| 7119579 | Supply voltage detection circuit | Yan Chong, Chiakang Sung, Bonnie I. Wang, Khai Nguyen, Joseph Huang +6 more | 2006-10-10 |
| 7116135 | Programmable high speed I/O interface | Bonnie I. Wang, Chiakang Sung, Joseph Huang, Khai Nguyen | 2006-10-03 |
| 7057962 | Address control for efficient memory partition | Johnson Tan, Chiakang Sung, Yan Chong, Joseph Huang | 2006-06-06 |
| 7002384 | Loop circuitry with low-pass noise filter | Yan Chong, Joseph Huang, Chiakang Sung, Tzung-Chin Chang | 2006-02-21 |
| 6992947 | Dual-port SRAM in a programmable logic device | Chiakang Sung, Joseph Huang, Bonnie I. Wang, Khai Nguyen, Xiaobao Wang +3 more | 2006-01-31 |
| 6961280 | Techniques for implementing address recycling in memory circuits | Chiakang Sung, Joseph Huang, Yan Chong, Johnson Tan | 2005-11-01 |
| 6946872 | Multiple data rate interface architecture | Chiakang Sung, Joseph Huang, Yan Chong, Bonnie I. Wang | 2005-09-20 |
| 6911860 | On/off reference voltage switch for multiple I/O standards | Xiaobao Wang, Chiakang Sung, Khai Nguyen, Joseph Huang, Bonnie I. Wang +4 more | 2005-06-28 |
| 6912164 | Techniques for preloading data into memory on programmable circuits | Yan Chong, Chiakang Sung, Joseph Huang, Johnson Tan | 2005-06-28 |
| 6870400 | Supply voltage detection circuit | Yan Chong, Chiakang Sung, Bonnie I. Wang, Khai Nguyen, Joseph Huang +6 more | 2005-03-22 |
| 6870413 | Schmitt trigger circuit with adjustable trip point voltages | Tzung-Chin Chang, Chiakang Sung, Khai Nguyen, Joseph Huang, Bonnie I. Wang +4 more | 2005-03-22 |
| 6825698 | Programmable high speed I/O interface | Bonnie I. Wang, Chiakang Sung, Joseph Huang, Khai Nguyen | 2004-11-30 |
| 6825692 | Input buffer for multiple differential I/O standards | Jonathan Chung, In Whan Kim, Chiakang Sung, Bonnie I. Wang, Xiaobao Wang +5 more | 2004-11-30 |
| 6806733 | Multiple data rate interface architecture | Chiakang Sung, Joseph Huang, Yan Chong, Bonnie I. Wang | 2004-10-19 |
| 6766505 | Parallel programming of programmable logic using register chains | Gopi Rangan, Khai Nguyen, Chiakang Sung, Xiaobao Wang, In Whan Kim +3 more | 2004-07-20 |