Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Michael Fitton — 31 Patents

Intel: 15 patents #2,763 of 30,777Top 9%
ASAchronix Semiconductor: 8 patents #10 of 38Top 30%
Kabushiki Kaisha Toshiba: 6 patents #4,930 of 21,451Top 25%
TCThe Science And Technology Facilities Council: 1 patents #11 of 69Top 20%
Menlo Park, CA: #254 of 3,774 inventorsTop 7%
California: #16,606 of 386,348 inventorsTop 5%
Overall (All Time): #115,823 of 4,157,543Top 3%
31 Patents All Time
Michael Fitton has been granted 31 US patents while listed as an inventor at Intel. The first was granted in 2007 and the most recent in November 2025. Michael Fitton ranks #115,823 of 4,157,543 US inventors in our database (top 2.8%). Patent records list Michael Fitton in Menlo Park, CA, US.

Issued Patents All Time

Showing 1–25 of 31 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12468506 Multiple mode arithmetic circuit David C. Pugh, Raymond Nijssen, Marcel Van der Goot 2025-11-11
12141088 Cascade communications between FPGA tiles Daniel Pugh, Raymond Nijssen, Marcel Van der Goot 2024-11-12
12034446 Fused memory and arithmetic circuit Daniel Pugh, Raymond Nijssen 2024-07-09
12014150 Multiple mode arithmetic circuit Daniel Pugh, Raymond Nijssen, Marcel Van der Goot 2024-06-18
11734216 Cascade communications between FPGA tiles Daniel Pugh, Raymond Nijssen, Marcel Van der Goot 2023-08-22
11650792 Multiple mode arithmetic circuit Daniel Pugh, Raymond Nijssen, Marcel Van der Goot 2023-05-16
11288220 Cascade communications between FPGA tiles Daniel Pugh, Raymond Nijssen, Marcel Van der Goot 2022-03-29
11256476 Multiple mode arithmetic circuit Daniel Pugh, Raymond Nijssen, Marcel Van der Goot 2022-02-22
10790830 Fused memory and arithmetic circuit Daniel Pugh, Raymond Nijssen 2020-09-29
9483233 Methods and apparatus for matrix decompositions in programmable logic devices 2016-11-01
9083139 Mounting vane for optical element of a laser Klaus Ertel, Tristan Richard Ghislain Davenne 2015-07-14
9000802 Systems and methods for interfacing between hard logic and soft logic in a hybrid integrated device Kulwinder Dhanoa, Benjamin Thomas Cope, Kellie Marks, Lei Xu 2015-04-07 $17,520,000
8897784 Processor for a base station control unit 2014-11-25 $4,635,000
8629691 Systems and methods for interfacing between hard logic and soft logic in a hybrid integrated device Kulwinder Dhanoa, Benjamin Thomas Cope, Kellie Marks, Lei Xu 2014-01-14 $10,767,000
8555031 Methods and apparatus for matrix decompositions in programmable logic devices 2013-10-08 $28,815,000
8548078 Ranging code detection Kulwinder Dhanoa, Mehul Mehta 2013-10-01 $19,073,000
8433322 Processor for a base station control unit 2013-04-30 $7,888,000
8428179 Apparatus and method for crest factor reduction Lei Xu 2013-04-23 $10,521,000
8359458 Methods and apparatus for matrix decompositions in programmable logic devices 2013-01-22 $30,433,000
8307021 Hardware architecture and scheduling for high performance solution to cholesky decomposition Kulwinder Dhanoa 2012-11-06 $22,590,000
8156171 Digital logic circuit 2012-04-10 $8,668,000
8121203 Ranging code detection Kulwinder Dhanoa, Mehul Mehta 2012-02-21 $11,276,000
7979673 Method and apparatus for matrix decompositions in programmable logic devices 2011-07-12 $16,000,000
7961669 Processor for a base station control unit 2011-06-14 $42,770,000
7761050 Communication network for indoor environment Douglas Gargin, Siew Leong 2010-07-20