Issued Patents All Time
Showing 26–32 of 32 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6384481 | Single step electroplating process for interconnect via fill and metal line patterning | Kevin J. Lee, Sam Sivakumar | 2002-05-07 |
| 6365529 | Method for patterning dual damascene interconnects using a sacrificial light absorbing material | Sam Sivakumar | 2002-04-02 |
| 6329118 | Method for patterning dual damascene interconnects using a sacrificial light absorbing material | Sam Sivakumar | 2001-12-11 |
| 6169024 | Process to manufacture continuous metal interconnects | — | 2001-01-02 |
| 6037255 | Method for making integrated circuit having polymer interlayer dielectric | Sam Sivakumar, Rick Davis | 2000-03-14 |
| 6020266 | Single step electroplating process for interconnect via fill and metal line patterning | Kevin J. Lee, Sam Sivakumar | 2000-02-01 |
| 5714413 | Method of making a transistor having a deposited dual-layer spacer structure | Lawrence N. Brigham, Raymond E. Cotner | 1998-02-03 |