Issued Patents All Time
Showing 151–159 of 159 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9336000 | Instruction execution unit that broadcasts data values at different levels of granularity | Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Bret L. Toll, Mark J. Charney | 2016-05-10 |
| 9323531 | Systems, apparatuses, and methods for determining a trailing least significant masking bit of a writemask register | Christopher J. Hughes, Mark J. Charney, Milind B. Girkar, Elmoustapha Ould-Ahmedvall, Bret L. Toll +1 more | 2016-04-26 |
| 9218182 | Systems, apparatuses, and methods for performing a shuffle and operation (shuffle-op) | Igor Ermolaev, Elmoustapha Ould-Ahmed-Vall, Bret L. Toll, Andrey Naraikin | 2015-12-22 |
| 8996923 | Apparatus and method to obtain information regarding suppressed faults | Christopher J. Hughes, Mark J. Charney, Milind B. Girkar, Elmoustapha Ould-Ahmed-Vall, Robert Valentine | 2015-03-31 |
| 8972698 | Vector conflict instructions | Christopher J. Hughes, Mark J. Charney, Yen-Kuang Chen, Andrew T. Forsyth, Milind B. Girkar +4 more | 2015-03-03 |
| 8707012 | Implementing vector memory operations | Roger Espasa, Joel S. Emer, Geoff Lowney, Roger Gramunt, Santiago Galan +3 more | 2014-04-22 |
| 8447962 | Gathering and scattering multiple data elements | Christopher J. Hughes, Yen-Kuang Chen, Mayank Bomb, Jason W. Brandt, Mark Buxton +13 more | 2013-05-21 |
| 8316216 | Implementing vector memory operations | Roger Espasa, Joel S. Emer, Geoff Lowney, Roger Gramunt, Santiago Galan +3 more | 2012-11-20 |
| 7627735 | Implementing vector memory operations | Roger Espasa, Joel S. Emer, Geoff Lowney, Roger Gramunt, Santiago Galan +3 more | 2009-12-01 |