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Apparatuses, methods, and systems for element sorting of vectors |
Mikhail Plotnikov |
2021-02-23 |
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Strideshift instruction for transposing bits inside vector register |
Mikhail Plotnikov |
2021-01-05 |
| 10838720 |
Methods and processors having instructions to determine middle, lowest, or highest values of corresponding elements of three vectors |
Mikhail Plotnikov |
2020-11-17 |
| 10191744 |
Apparatuses, methods, and systems for element sorting of vectors |
Mikhail Plotnikov |
2019-01-29 |
| 9910670 |
Instruction set for eliminating misaligned memory accesses during processing of an array having misaligned data rows |
Mikhail Plotnikov |
2018-03-06 |
| 9684510 |
Systems, apparatuses, and methods for performing a shuffle and operation (Shuffle-Op) |
Elmoustapha Ould-Ahmed-Vall, Bret L. Toll, Jesus Corbal San Adrian, Andrey Naraikin |
2017-06-20 |
| 9552205 |
Vector indexed memory access plus arithmetic and/or logical operation processors, methods, systems, and instructions |
Bret L. Toll, Robert Valentine, Jesus Corbal San Adrian, Gautam Doshi, Rama Kishan V. Malladi +1 more |
2017-01-24 |
| 9218182 |
Systems, apparatuses, and methods for performing a shuffle and operation (shuffle-op) |
Elmoustapha Ould-Ahmed-Vall, Bret L. Toll, Jesus Corbal, Andrey Naraikin |
2015-12-22 |
| 9122475 |
Instruction for shifting bits left with pulling ones into less significant bits |
Mikhail Plotnikov, Andrey Naraikin, Robert Valentine |
2015-09-01 |
| 8700857 |
Optimizing memory copy routine selection for message passing in a multicore architecture |
Sergey I. Sapronov, Alexey V. Bayduraev, Alexander V. Supalov, Vladimir D. Truschin, Dmitry Mishura |
2014-04-15 |
| 8347038 |
Optimizing memory copy routine selection for message passing in a multicore architecture |
Sergey I. Sapronov, Alexey V. Bayduraev, Alexander V. Supalov, Vladimir D. Truschin, Dmitry Mishura |
2013-01-01 |