Issued Patents All Time
Showing 51–75 of 95 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8589706 | Data inversion based approaches for reducing memory power consumption | Ming Zhang, Chris Wilkerson, Greg Taylor, Randy J. Aksamit | 2013-11-19 |
| 8488390 | Circuits and methods for memory | Jaydeep P. Kulkarni, Dinesh Somasekhar, Vivek K. De | 2013-07-16 |
| 8312306 | Component reliability budgeting system | Siva G. Narendra, Vivek K. De, Stephen H. Tang | 2012-11-13 |
| 8288846 | Power management integrated circuit | Siva G. Narendra, Howard A. Wilson, Donald S. Gardner, Peter Hazucha, Gerhard Schrom +4 more | 2012-10-16 |
| 7689845 | Component reliability budgeting system | Siva G. Narendra, Vivek K. De, Stephen H. Tang | 2010-03-30 |
| 7684520 | Method and apparatus for bus repeater tapering | Muhammad M. Khellah, Yibin Ye, Vivek K. De | 2010-03-23 |
| 7653850 | Delay fault detection using latch with error sampling | Keith Alan Bowman, Nam Sung Kim, Chris Wilkerson, Shih-Lien Linus Lu, Tanay Karnik | 2010-01-26 |
| 7562316 | Apparatus for power consumption reduction | Nasser A. Kurd, Javed S. Barkatullah, Vivek K. De | 2009-07-14 |
| 7444528 | Component reliability budgeting system | Siva G. Narendra, Vivek K. De, Stephen H. Tang | 2008-10-28 |
| 7423899 | SRAM device having forward body bias control | Stephen H. Tang, Muhammad M. Khellah, Dinesh Somasekhar, Yibin Ye, Vivek K. De | 2008-09-09 |
| 7409631 | Error-detection flip-flop | Subhasish Mitra, Vivek K. De | 2008-08-05 |
| 7400186 | Bidirectional body bias regulation | Victor Zia, Vivek K. De, Joseph Shor | 2008-07-15 |
| 7397395 | Representative majority voter for bus invert coding | Mircea R. Stan, Muhammad M. Khellah, Yibin Ye, Vivek K. De | 2008-07-08 |
| 7376849 | Method, apparatus and system of adjusting one or more performance-related parameters of a processor | Stephen H. Tang, Siva G. Narendra, Vivek K. De | 2008-05-20 |
| 7342845 | Method and apparatus to clamp SRAM supply voltage | Dinesh Somasekhar, Muhammad M. Khellah, Yibin Ye, Vivek K. De, Stephen H. Tang | 2008-03-11 |
| 7326972 | Interconnect structure in integrated circuits | Maged Ghoneima, Muhammad M. Khellah, Yibin Ye, Vivek K. De | 2008-02-05 |
| 7307899 | Reducing power consumption in integrated circuits | Muhammad M. Khellah, Dinesh Somasekhar, Yibin Ye, Vivek K. De, Stephen H. Tang | 2007-12-11 |
| 7282966 | Frequency management apparatus, systems, and methods | Siva G. Narendra, Vivek K. De, Nasser A. Kurd, Javed S. Barkatullah | 2007-10-16 |
| 7236045 | Bias generator for body bias | Stephen H. Tang, Victor Zia, Badarinath Kommandur, Siva G. Narendra, Vivek K. De | 2007-06-26 |
| 7236005 | Majority voter circuit design | Yibin Yee, Muhammad M. Khellah, Vivek K. De | 2007-06-26 |
| 7206249 | SRAM cell power reduction circuit | Muhammad M. Khellah, Dinesh Somasekhar, Yibin Ye, Stephen H. Tang, Vivek K. De | 2007-04-17 |
| 7190286 | Single-stage and multi-stage low power interconnect architectures | Maged Ghoneima, Peter Caputa, Muhammad M. Khellah, Ram Krishnamurthy, Yiben Ye +2 more | 2007-03-13 |
| 7183795 | Majority voter apparatus, systems, and methods | Yibin Ye, Muhammad M. Khellah, Vivek K. De | 2007-02-27 |
| 7164307 | Bias generator for body bias | Stephen H. Tang, Victor Zia, Badarinath Kommandur, Siva G. Narendra, Vivek K. De | 2007-01-16 |
| 7120804 | Method and apparatus for reducing power consumption through dynamic control of supply voltage and body bias including maintaining a substantially constant operating frequency | Yibin Ye, Liqiong Wei, Vivek K. De | 2006-10-10 |