GN

Gilbert Neiger

IN Intel: 159 patents #88 of 30,777Top 1%
TR Tahoe Research: 1 patents #81 of 215Top 40%
📍 Portland, OR: #41 of 9,213 inventorsTop 1%
🗺 Oregon: #81 of 28,073 inventorsTop 1%
Overall (All Time): #5,044 of 4,157,543Top 1%
165
Patents All Time

Issued Patents All Time

Showing 76–100 of 165 patents

Patent #TitleCo-InventorsDate
9164920 Using permission bits in translating guests virtual addresses to guest physical addresses to host physical addresses Steven M. Bennett, Andrew V. Anderson, Rajesh Madukkarumukumana, Richard UhligQ, Lawrence O. Smith +1 more 2015-10-20
9152561 Maintaining processor resources during architectural events Jason W. Brandt, Sanjoy K. Mondal, Richard Uhlig, Robert T. George 2015-10-06
9141555 Synchronizing a translation lookaside buffer with an extended paging table Steven M. Bennett, Andrew V. Anderson, Richard Uhlig, Scott Dion Rodgers, Rajesh M. Sankaran +2 more 2015-09-22
9141454 Signaling software recoverable errors Ashok Raj, John G. Holm, Rajesh M. Sankaran, Mohan J. Kumar 2015-09-22
9122624 Synchronizing a translation lookaside buffer with an extended paging table Steven M. Bennett, Andrew V. Anderson, Richard Uhlig, Dion Rodgers, Rajesh M. Sankaran +2 more 2015-09-01
9116869 Posting interrupts to virtual processors Rajesh Madukkarumukumana, Ohad Falik, Sridhar Muthrasanallur, Gideon Gerzon 2015-08-25
9086958 Maintaining processor resources during architectural events Jason W. Brandit, Sanjoy K. Mondal, Richard Uhlig, Robert T. George 2015-07-21
8997099 Virtualization event processing in a layered virtualization architecture Steven M. Bennett, Andrew V. Anderson, Dion Rodgers, Richard Uhlig, Lawrence O. Smith +1 more 2015-03-31
8949571 Synchronizing a translation lookaside buffer with an extended paging table Steven M. Bennett, Andrew V. Anderson, Richard Uhlig, Dion Rodgers, Rajesh M. Sankaran +2 more 2015-02-03
8938606 System, apparatus, and method for segment register read and write regardless of privilege level Baiju V. Patel, Martin G. Dixon, James S. Coke, James B. Crossland 2015-01-20
8938737 Delivering interrupts directly to a virtual processor Rajesh Madukkarumukumana, Richard Uhlig, Udo Steinberg, Sebastian Schoenberg, Sridhar Muthrasanallur +3 more 2015-01-20
8910158 Virtualizing interrupt priority and delivery Rajesh M. Sankaran, Gideon Gerzon, Richard Uhlig, Sergiu D. Ghetie, Michael Neve de Mevergnies +1 more 2014-12-09
8843683 Posting interrupts to virtual processors Rajesh Madukkarumukumana, Ohad Falik, Sridhar Muthrasanallur, Gideon Gerzon 2014-09-23
8843727 Performance enhancement of address translation using translation tables covering large address spaces Ioannis T. Schoinas, Rajesh Madukkarumukumana, Ku-Jei King, Richard Uhlig, Achmed R. Zahir +1 more 2014-09-23
8813077 Virtualization event processing in a layered virtualization architecture Steven M. Bennett, Andrew V. Anderson, Scott Dion Rodgers, Richard Uhlig, Lawrence O. Smith +1 more 2014-08-19
8806172 Maintaining processor resources during architectural evens Jason W. Brandt, Sanjoy K. Mondal, Richard Uhlig, Robert T. George 2014-08-12
8788790 Maintaining processor resources during architectural events Jason W. Brandt, Sanjoy K. Mondal, Richard Uhlig, Robert T. George 2014-07-22
8751752 Invalidating translation lookaside buffer entries in a virtual machine system Eric C. Cota-Robles, Stalinselvaraj Jeyasingh, Alain Kagi, Michael Kozuch, Richard Uhlig 2014-06-10
8677163 Context state management for processor feature sets Don A. Van Dyke, Michael Mishaeli, Ittai Anati, Baiju V. Patel, Will Deutsch +7 more 2014-03-18
8645665 Virtualizing physical memory in a virtual machine system utilizing multilevel translation table base registers to map guest virtual addresses to guest physical addresses then to host physical addresses Steven M. Bennett, Andrew V. Anderson, Rajesh Madukkarumukumana, Richard Uhlig, Larry Smith +1 more 2014-02-04
8635415 Managing and implementing metadata in central processing unit using register extensions Baiju V. Patel, Rajeev Gopalakrishna, Andrew F. Glew, Robert J. Kushlis, Don A. Van Dyke +7 more 2014-01-21
8631261 Context state management for processor feature sets Don A. Van Dyke, Michael Mishaeli, Ittai Anati, Baiju V. Patel, Will Deutsch +7 more 2014-01-14
8607228 Virtualizing performance counters Erik Cota-Robles, Steven M. Bennett, Andrew V. Anderson 2013-12-10
8601233 Synchronizing a translation lookaside buffer with an extended paging table Steven M. Bennett, Andrew V. Anderson, Richard Uhlig, Scott Dion Rodgers, Rajesh M. Sankaran +2 more 2013-12-03
8566492 Posting interrupts to virtual processors Rajesh Madukkarumukumana, Ohad Falik, Sridhar Muthrasanallur, Gideon Gerzon 2013-10-22