Issued Patents All Time
Showing 51–75 of 80 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8850254 | Dynamic control of reduced voltage state of graphics controller component of memory controller | Aditya Navale | 2014-09-30 |
| 8806243 | Method of and apparatus for energy savings associated with a graphics core | Nikos Kaburlasos | 2014-08-12 |
| 8781641 | Method and apparatus for external processor thermal control | John W. Horigan, Robert T. Jackson, Ticky Thakkar | 2014-07-15 |
| 8510585 | Dynamic control of reduced voltage state of graphics controller component of memory controller | Aditya Navale | 2013-08-13 |
| 8411095 | Performance allocation method and apparatus | Murali Ramadoss | 2013-04-02 |
| 8386808 | Adaptive power budget allocation between multiple components in a computing system | Guy M. Therien, Murali Ramadoss, Gregory D. Kaine, Venkatesh Ramani | 2013-02-26 |
| 8314806 | Low power display mode | Aditya Navale, Todd M. Witter | 2012-11-20 |
| 8301927 | Dynamic control of reduced voltage state of graphics controller component of memory controller | Aditya Navale | 2012-10-30 |
| 8243085 | Boosting graphics performance based on executing workload | Aditya Navale | 2012-08-14 |
| 8209710 | Implementation system for business applications | — | 2012-06-26 |
| 8199158 | Performance allocation method and apparatus | Murali Ramadoss | 2012-06-12 |
| 8072451 | Efficient Z testing | Thomas A. Piazza, Nasseh Akaaboune, Dinakar C. Munagala | 2011-12-06 |
| 8037334 | Dynamic power control for reduced voltage level of graphics controller component of memory controller based on its degree of idleness | Aditya Navale | 2011-10-11 |
| 7925899 | Method, system, and apparatus for runtime power estimation | Madhu Gumma, Anand Kumar Ramachandran | 2011-04-12 |
| 7724264 | Calculating display mode values | Kalpesh Mehta, Mike Donlon, Wen-Shan Wang | 2010-05-25 |
| 7698575 | Managing power consumption by requesting an adjustment to an operating point of a processor | — | 2010-04-13 |
| 7613941 | Mechanism for self refresh during advanced configuration and power interface (ACPI) standard C0 power state | Robert J. Riesenman | 2009-11-03 |
| 7581129 | Dynamic power control for reduced voltage level of graphics controller component of memory controller based on its degree of idleness | Aditya Navale | 2009-08-25 |
| 7523327 | System and method of coherent data transfer during processor idle states | Leslie E. Cline, Siripong Sritanyaratana, Alon Naveh, Shai Rotem, Michael N. Derr | 2009-04-21 |
| 7343502 | Method and apparatus for dynamic DLL powerdown and memory self-refresh | Aditya Navale, Leslie E. Cline | 2008-03-11 |
| 7268779 | Z-buffering techniques for graphics rendering | Thomas A. Piazza | 2007-09-11 |
| 7222253 | Dynamic power control for reducing voltage level of graphics controller component of memory controller based on its degree of idleness | Aditya Navale | 2007-05-22 |
| 7149909 | Power management for an integrated graphics device | Ying Cui, Ariel Berkovits, Aditya Navale, David Wyatt, Leslie E. Cline +5 more | 2006-12-12 |
| 6971034 | Power/performance optimized memory controller considering processor power states | Aditya Navale, Richard S. Jensen, Siripong Sritanyaratana, Win Sheng Cheng | 2005-11-29 |
| 6871119 | Filter based throttling | Aditya Navale, David Puffer | 2005-03-22 |