Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12086603 | Processor having multiple cores, shared core extension logic, and shared core extension utilization instructions | Mostafa Hagog, Eliyahu Turiel | 2024-09-10 |
| 11494194 | Processor having multiple cores, shared core extension logic, and shared core extension utilization instructions | Mostafa Hagog, Eliyahu Turiel | 2022-11-08 |
| 10963263 | Processor having multiple cores, shared core extension logic, and shared core extension utilization instructions | Mostafa Hagog, Eliyahu Turiel | 2021-03-30 |
| 10901748 | Processor having multiple cores, shared core extension logic, and shared core extension utilization instructions | Mostafa Hagog, Eliyahu Turiel | 2021-01-26 |
| 10599568 | Management of coherent links and multi-level memory | — | 2020-03-24 |
| 10229059 | Dynamic fill policy for a shared cache | Ayan Mandal, Leon Polishuk | 2019-03-12 |
| 10061593 | Processor having multiple cores, shared core extension logic, and shared core extension utilization instructions | Mostafa Hagog, Eliyahu Turiel | 2018-08-28 |
| 9734079 | Hybrid exclusive multi-level memory architecture with memory management | Dannie Gerrit Feekes, Shlomo Raikin, Blaise Fanning, Joydeep Ray, Julius Mandelblat +3 more | 2017-08-15 |
| 9582287 | Processor having multiple cores, shared core extension logic, and shared core extension utilization instructions | Mostafa Hagog, Eliyahu Turiel | 2017-02-28 |
| 8959266 | Dynamic priority control based on latency tolerance | Nadav Bonen, Todd M. Witter, Tomer Levy, Zvika Greenfield, Anant Vithal Nori | 2015-02-17 |