Issued Patents All Time
Showing 26–50 of 50 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6901420 | Method and apparatus for performing packed shift operations | Punit Minocha, Alexander Peleg, Yaakov Yaari, Millind Mittal, Larry M. Mennemeier +1 more | 2005-05-31 |
| 6795905 | Controlling accesses to isolated memory using a memory controller for isolated execution | Carl M. Ellison, Roger Golliver, Howard C. Herbert, Francis X. McKeen, Gilbert Neiger +4 more | 2004-09-21 |
| 6769058 | Resetting a processor in an isolated execution environment | Carl M. Ellison, Roger Golliver, Howard C. Herbert, Francis X. McKeen, Gilbert Neiger +4 more | 2004-07-27 |
| 6760441 | Generating a key hieararchy for use in an isolated execution environment | Carl M. Ellison, Roger Golliver, Howard C. Herbert, Francis X. McKeen, Gilbert Neiger +4 more | 2004-07-06 |
| 6754815 | Method and system for scrubbing an isolated area of memory after reset of a processor operating in isolated execution mode if a cleanup flag is set | Carl M. Ellison, Roger Golliver, Howard C. Herbert, Francis X. McKeen, Gilbert Neiger +4 more | 2004-06-22 |
| 6738793 | Processor capable of executing packed shift operations | Punit Minocha, Alexander Peleg, Yaakov Yaari, Millind Mittal, Larry M. Mennemeier +2 more | 2004-05-18 |
| 6678825 | Controlling access to multiple isolated memories in an isolated execution environment | Carl M. Ellison, Roger Golliver, Howard C. Herbert, Francis X. McKeen, Gilbert Neiger +4 more | 2004-01-13 |
| 6633963 | Controlling access to multiple memory zones in an isolated execution environment | Carl M. Ellison, Roger Golliver, Howard C. Herbert, Francis X. McKeen, Gilbert Neiger +4 more | 2003-10-14 |
| 6631389 | Apparatus for performing packed shift operations | Punit Minocha, Alexander Peleg, Yaakov Yaari, Millind Mittal, Larry M. Mennemeier +1 more | 2003-10-07 |
| 6631452 | Register stack engine having speculative load/store modes | — | 2003-10-07 |
| 6507904 | Executing isolated mode instructions in a secure system running in privilege rings | Carl M. Ellison, Roger Golliver, Howard C. Herbert, Francis X. McKeen, Gilbert Neiger +4 more | 2003-01-14 |
| 6275834 | Apparatus for performing packed shift operations | Punit Minocha, Alexander Peleg, Yaakov Yaari, Millind Mittal, Larry M. Mennemeier +1 more | 2001-08-14 |
| 6205542 | Processor pipeline including replay | Edward T. Grochowski | 2001-03-20 |
| 6076153 | Processor pipeline including partial replay | Edward T. Grochowski | 2000-06-13 |
| 6035316 | Apparatus for performing multiply-add operations on packed data | Alexander Peleg, Millind Mittal, Larry M. Mennemeier, Benny Eitan, Carole Dulong +3 more | 2000-03-07 |
| 6035389 | Scheduling instructions with different latencies | Edward T. Grochowski, Hans Mulder | 2000-03-07 |
| 5991884 | Method for reducing peak power in dispatching instructions to multiple execution units | Varsha P. Tagare, Ramamohan R. Vakkalagadda | 1999-11-23 |
| 5974525 | System for allowing multiple instructions to use the same logical registers by remapping them to separate physical segment registers when the first is being utilized | Ramamohan R. Vakkalagadda, Satchitanand Jain, Varsha P. Tagare, Nimish H. Modi | 1999-10-26 |
| 5959636 | Method and apparatus for performing saturation instructions using saturation limit values | Mehrdad Mohebbi, Kay K. Huang | 1999-09-28 |
| 5959874 | Method and apparatus for inserting control digits into packed data to perform packed arithmetic operations | Mehrdad Mohebbi | 1999-09-28 |
| 5881279 | Method and apparatus for handling invalid opcode faults via execution of an event-signaling micro-operation | Champa R. Yellamilli, Charkravaythy Kosaraju, Nimish H. Modi, Ed Grochowski | 1999-03-09 |
| 5852726 | Method and apparatus for executing two types of instructions that specify registers of a shared logical register file in a stack and a non-stack referenced manner | Romamohan R. Vakkalagadda, Andrew F. Glew, Larry M. Mennemeier, Alexander Peleg, David Bistry +4 more | 1998-12-22 |
| 5835748 | Method for executing different sets of instructions that cause a processor to perform different data type operations on different physical registers files that logically appear to software as a single aliased register file | Doron Orenstein, Ofri Wechsler, Millind Mittal, Andrew F. Glew, Larry M. Mennemeier +6 more | 1998-11-10 |
| 5835782 | Packed/add and packed subtract operations | Mehrdad Mohebbi | 1998-11-10 |
| 5701508 | Executing different instructions that cause different data type operations to be performed on single logical register file | Andrew F. Glew, Larry M. Mennemeier, Alexander Peleg, David Bistry, Millind Mittal +4 more | 1997-12-23 |