Issued Patents All Time
Showing 26–38 of 38 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7761857 | Method for switching between interpretation and dynamic translation in a processor system based upon code sequence execution counts | Robert Bedichek, Linus Torvalds | 2010-07-20 |
| 7640450 | Method and apparatus for handling nested faults | H. Peter Anvin | 2009-12-29 |
| 7617088 | Interpage prologue to protect virtual address mappings | Robert Bedichek, John Banning | 2009-11-10 |
| 6845353 | Interpage prologue to protect virtual address mappings | Robert Bedichek, John Banning | 2005-01-18 |
| 6829719 | Method and apparatus for handling nested faults | H. Peter Anvin | 2004-12-07 |
| 6738892 | Use of enable bits to control execution of selected instructions | Brett W. Coon | 2004-05-18 |
| 6714904 | System for using rate of exception event generation during execution of translated instructions to control optimization of the translated instructions | Linus Torvalds | 2004-03-30 |
| 6668287 | Software direct memory access | Patrick E. Boyle, Alex Klaiber, Edmund J. Kelly | 2003-12-23 |
| 6513110 | Check instruction and method | Paul Serris, Godfrey P. D'Souza | 2003-01-28 |
| 6415379 | Method and apparatus for maintaining context while executing translated instructions | Robert F. Cmelik, Robert Bedichek | 2002-07-02 |
| 6363336 | Fine grain translation discrimination | John Banning, H. Peter Anvin, Benjamin Iver Gribstad, Alex Klaiber, Paul Serris | 2002-03-26 |
| 6356615 | Programmable event counter system | Brett W. Coon, Charles R. Price | 2002-03-12 |
| 5905855 | Method and apparatus for correcting errors in computer systems | Alex Klaiber, Robert Bedichek | 1999-05-18 |