Issued Patents All Time
Showing 26–50 of 168 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11048800 | Composable trustworthy execution environments | Kapil Sood, Ioannis T. Schoinas, Yu-Yuan Chen, Raghunandan Makaram, Baiju V. Patel +3 more | 2021-06-29 |
| 10970238 | Non-posted write transactions for a computer bus | Rajesh M. Sankaran, Sean O. Stalley, Rupin H. Vakharwala, Ishwar Agarwal, Pratik M. Marolia +1 more | 2021-04-06 |
| 10884971 | Communicating a message request transaction to a logical device | Jasmin Ajanovic | 2021-01-05 |
| 10884965 | PCI express tunneling over a multi-protocol I/O interconnect | Maxim Dan | 2021-01-05 |
| 10877915 | Flattening portal bridge | Reuven Rozic, Maxim Dan, Prashant Sethi, Robert E. Gough, Shanthanand Kutuva Rabindranath | 2020-12-29 |
| 10754808 | Bus-device-function address space mapping | Prashant Sethi, Michael T. Klinglesmith, Reuven Rozic, Shanthanand Kutuva Rabindrananth | 2020-08-25 |
| 10581545 | Two-wire link for time-multiplexed power and data transmission to multiple devices | Huimin Chen, Yong Yang | 2020-03-03 |
| 10545773 | System, method, and apparatus for DVSEC for efficient peripheral management | Vinay Raghav, Reuven Rozic | 2020-01-28 |
| 10521388 | Multi-uplink device enumeration and management | Vinay Raghav, Utkarsh Y. Kakaiya | 2019-12-31 |
| 10509729 | Address translation for scalable virtualization of input/output devices | Rajesh M. Sankaran, Randolph L. Campbell, Prashant Sethi | 2019-12-17 |
| 10503684 | Multiple uplink port devices | Debendra Das Sharma, Anil Vasudevan | 2019-12-10 |
| 10423552 | Integrated component interconnect | — | 2019-09-24 |
| 10387348 | PCI express tunneling over a multi-protocol I/O interconnect | Maxim Dan | 2019-08-20 |
| 10360171 | Communicating a message request transaction to a logical device | Jasmin Ajanovic | 2019-07-23 |
| 10331492 | Techniques to dynamically allocate resources of configurable computing resources | Andrew J. Herdrich, Kapil Sood, Nrupal Jani, Mesut A. Ergin, Scott P. Dubal +1 more | 2019-06-25 |
| 10191877 | Architecture for software defined interconnect switch | Manjari Kulkarni, Akshay G. Pethe, Sean O. Stalley, Mahesh Wagh, Debendra Das Sharma | 2019-01-29 |
| 10185385 | Method and apparatus to reduce idle link power in a platform | Paul S. Diefenbaugh, Robert E. Gough, Yuval Bachrach, Mikal C. Hunsaker, Rafi Ben-Tal +2 more | 2019-01-22 |
| 10146290 | Platform communication protocol | Seh Kwa, Neil W. Songer, Rob Gough | 2018-12-04 |
| 10061707 | Speculative enumeration of bus-device-function address space | Shanthanand Kutuva Rabindranath, Prashant Sethi, Vijayalakshmi Kothandan | 2018-08-28 |
| 9952986 | Power delivery and data transmission using PCIe protocol via USB type-C port | Akshay G. Pethe, Mahesh Wagh, Abdul Ismail | 2018-04-24 |
| 9946683 | Reducing precision timing measurement uncertainty | Daniel S. Froelich | 2018-04-17 |
| 9934181 | PCI express tunneling over a multi-protocol I/O interconnect | Maxim Dan | 2018-04-03 |
| 9860173 | General input/output architecture, protocol and related methods to implement flow control | Jasmin Ajanovic, Blaise Fanning, David M. Lee | 2018-01-02 |
| 9847936 | Apparatus and method for hardware-accelerated packet processing | Nrupal Jani, Dinesh Kumar, Christian Maciocco, Ren Wang, Neerav Parikh +4 more | 2017-12-19 |
| 9836424 | General input/output architecture, protocol and related methods to implement flow control | Jasmin Ajanovic, Blaise Fanning, David M. Lee | 2017-12-05 |